Archipelago » qemu

#define HF_OSFXSR_SHIFT     16 /* CR4.OSFXSR */

#define HF_VM_SHIFT         17 /* must be same as eflags */

#define HF_HALTED_SHIFT     18 /* CPU halted */

#define HF_CPL_MASK          (3 << HF_CPL_SHIFT)

#define HF_SOFTMMU_MASK      (1 << HF_SOFTMMU_SHIFT)

#define HF_CS64_MASK         (1 << HF_CS64_SHIFT)

#define HF_OSFXSR_MASK       (1 << HF_OSFXSR_SHIFT)

#define HF_HALTED_MASK       (1 << HF_HALTED_SHIFT)

#define CR0_PE_MASK  (1 << 0)

#define CR0_MP_MASK  (1 << 1)

    int exception_is_int;

    target_ulong exception_next_eip;

    target_ulong dr[8]; /* debug registers */

    int interrupt_request; 

    int user_mode_only; /* user mode only simulation */

#ifndef NO_CPU_IO_DEFS

uint8_t cpu_get_apic_tpr(CPUX86State *env);

#endif

/* will be suppressed */

void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);