Revision 3b21e03e target-i386/helper2.c
| b/target-i386/helper2.c | ||
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| 161 | 161 |
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| 162 | 162 |
cpu_x86_update_cr0(env, 0x60000010); |
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env->a20_mask = 0xffffffff; |
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env->smbase = 0x30000; |
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env->idt.limit = 0xffff; |
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env->gdt.limit = 0xffff; |
| 167 | 168 |
env->ldt.limit = 0xffff; |
| ... | ... | |
| 268 | 269 |
"RSI=%016" PRIx64 " RDI=%016" PRIx64 " RBP=%016" PRIx64 " RSP=%016" PRIx64 "\n" |
| 269 | 270 |
"R8 =%016" PRIx64 " R9 =%016" PRIx64 " R10=%016" PRIx64 " R11=%016" PRIx64 "\n" |
| 270 | 271 |
"R12=%016" PRIx64 " R13=%016" PRIx64 " R14=%016" PRIx64 " R15=%016" PRIx64 "\n" |
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"RIP=%016" PRIx64 " RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n", |
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"RIP=%016" PRIx64 " RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n",
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env->regs[R_EAX], |
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env->regs[R_EBX], |
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env->regs[R_ECX], |
| ... | ... | |
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env->hflags & HF_CPL_MASK, |
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(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, |
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(env->a20_mask >> 20) & 1, |
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(env->hflags >> HF_SMM_SHIFT) & 1, |
|
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(env->hflags >> HF_HALTED_SHIFT) & 1); |
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} else |
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#endif |
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{
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cpu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n" |
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"ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n" |
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"EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n", |
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"EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n",
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(uint32_t)env->regs[R_EAX], |
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(uint32_t)env->regs[R_EBX], |
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(uint32_t)env->regs[R_ECX], |
| ... | ... | |
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env->hflags & HF_CPL_MASK, |
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(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, |
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(env->a20_mask >> 20) & 1, |
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(env->hflags >> HF_SMM_SHIFT) & 1, |
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(env->hflags >> HF_HALTED_SHIFT) & 1); |
| 326 | 329 |
} |
| 327 | 330 |
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