Revision 3b46e624 cpu-exec.c

b/cpu-exec.c
84 84
    unsigned int h;
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    target_ulong phys_pc, phys_page1, phys_page2, virt_page2;
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    uint8_t *tc_ptr;
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    spin_lock(&tb_lock);
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    tb_invalidated_flag = 0;
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    regs_to_env(); /* XXX: do it just before cpu_gen_code() */
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    /* find translated block using physical mappings */
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    phys_pc = get_phys_addr_code(env, pc);
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    phys_page1 = phys_pc & TARGET_PAGE_MASK;
......
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    tb->flags = flags;
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    cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size);
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    code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
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    /* check next page if needed */
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    virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;
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    phys_page2 = -1;
......
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        phys_page2 = get_phys_addr_code(env, virt_page2);
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    }
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    tb_link_phys(tb, phys_pc, phys_page2);
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 found:
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    /* we add the TB in the virtual pc hash table */
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    env->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
......
371 371
#if defined(__sparc__) && !defined(HOST_SOLARIS)
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                /* g1 can be modified by some libc? functions */
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                tmp_T0 = T0;
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#endif	   
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#endif
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                interrupt_request = env->interrupt_request;
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                if (__builtin_expect(interrupt_request, 0)) {
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                    if (interrupt_request & CPU_INTERRUPT_DEBUG) {
......
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#endif
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#if defined(__sparc__) && !defined(HOST_SOLARIS)
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                T0 = tmp_T0;
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#endif	   
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#endif
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                /* see if we can patch the calling TB. When the TB
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                   spans two pages, we cannot safely do a direct
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                   jump. */
......
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    saved_env = env;
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    env = s;
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    helper_fsave((target_ulong)ptr, data32);
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    env = saved_env;
......
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    saved_env = env;
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    env = s;
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    helper_frstor((target_ulong)ptr, data32);
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    env = saved_env;
......
953 953
{
954 954
    TranslationBlock *tb;
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    int ret;
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    if (cpu_single_env)
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        env = cpu_single_env; /* XXX: find a correct solution for multithread */
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#if defined(DEBUG_SIGNAL)
......
1042 1042
{
1043 1043
    TranslationBlock *tb;
1044 1044
    int ret;
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1046 1046
    if (cpu_single_env)
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        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1048 1048
#if defined(DEBUG_SIGNAL)
......
1092 1092
{
1093 1093
    TranslationBlock *tb;
1094 1094
    int ret;
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    if (cpu_single_env)
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        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1098 1098
#if defined(DEBUG_SIGNAL)
......
1137 1137
{
1138 1138
    TranslationBlock *tb;
1139 1139
    int ret;
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1141 1141
    if (cpu_single_env)
1142 1142
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1143 1143
#if defined(DEBUG_SIGNAL)
......
1371 1371
    unsigned long pc;
1372 1372
    int is_write;
1373 1373
    uint32_t insn;
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    /* XXX: is there a standard glibc define ? */
1376 1376
    pc = regs[1];
1377 1377
    /* XXX: need kernel patch to get write flag faster */
......
1403 1403
    struct ucontext *uc = puc;
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    unsigned long pc;
1405 1405
    int is_write;
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    pc = uc->uc_mcontext.gregs[R15];
1408 1408
    /* XXX: compute is_write */
1409 1409
    is_write = 0;
......
1421 1421
    struct ucontext *uc = puc;
1422 1422
    unsigned long pc;
1423 1423
    int is_write;
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1425 1425
    pc = uc->uc_mcontext.gregs[16];
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    /* XXX: compute is_write */
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    is_write = 0;
......
1473 1473
    struct ucontext *uc = puc;
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    unsigned long pc;
1475 1475
    int is_write;
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1477 1477
    pc = uc->uc_mcontext.psw.addr;
1478 1478
    /* XXX: compute is_write */
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    is_write = 0;
......
1490 1490
    struct ucontext *uc = puc;
1491 1491
    greg_t pc = uc->uc_mcontext.pc;
1492 1492
    int is_write;
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1494 1494
    /* XXX: compute is_write */
1495 1495
    is_write = 0;
1496 1496
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,

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