Revision 3b46e624 exec.c
b/exec.c | ||
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175 | 175 |
{ |
176 | 176 |
SYSTEM_INFO system_info; |
177 | 177 |
DWORD old_protect; |
178 |
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178 |
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179 | 179 |
GetSystemInfo(&system_info); |
180 | 180 |
qemu_real_host_page_size = system_info.dwPageSize; |
181 |
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181 |
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182 | 182 |
VirtualProtect(code_gen_buffer, sizeof(code_gen_buffer), |
183 | 183 |
PAGE_EXECUTE_READWRITE, &old_protect); |
184 | 184 |
} |
... | ... | |
189 | 189 |
|
190 | 190 |
start = (unsigned long)code_gen_buffer; |
191 | 191 |
start &= ~(qemu_real_host_page_size - 1); |
192 |
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192 |
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193 | 193 |
end = (unsigned long)code_gen_buffer + sizeof(code_gen_buffer); |
194 | 194 |
end += qemu_real_host_page_size - 1; |
195 | 195 |
end &= ~(qemu_real_host_page_size - 1); |
196 |
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196 |
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197 | 197 |
mprotect((void *)start, end - start, |
198 | 198 |
PROT_READ | PROT_WRITE | PROT_EXEC); |
199 | 199 |
} |
... | ... | |
345 | 345 |
nb_tbs > 0 ? (code_gen_ptr - code_gen_buffer) / nb_tbs : 0); |
346 | 346 |
#endif |
347 | 347 |
nb_tbs = 0; |
348 |
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348 |
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349 | 349 |
for(env = first_cpu; env != NULL; env = env->next_cpu) { |
350 | 350 |
memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *)); |
351 | 351 |
} |
... | ... | |
382 | 382 |
{ |
383 | 383 |
TranslationBlock *tb; |
384 | 384 |
int i, flags1, flags2; |
385 |
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385 |
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386 | 386 |
for(i = 0;i < CODE_GEN_PHYS_HASH_SIZE; i++) { |
387 | 387 |
for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) { |
388 | 388 |
flags1 = page_get_flags(tb->pc); |
... | ... | |
491 | 491 |
unsigned int h, n1; |
492 | 492 |
target_ulong phys_pc; |
493 | 493 |
TranslationBlock *tb1, *tb2; |
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494 |
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495 | 495 |
/* remove the TB from the hash list */ |
496 | 496 |
phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK); |
497 | 497 |
h = tb_phys_hash_func(phys_pc); |
... | ... | |
571 | 571 |
{ |
572 | 572 |
int n, tb_start, tb_end; |
573 | 573 |
TranslationBlock *tb; |
574 |
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574 |
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575 | 575 |
p->code_bitmap = qemu_malloc(TARGET_PAGE_SIZE / 8); |
576 | 576 |
if (!p->code_bitmap) |
577 | 577 |
return; |
... | ... | |
624 | 624 |
tb->cflags = cflags; |
625 | 625 |
cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size); |
626 | 626 |
code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); |
627 |
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627 |
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628 | 628 |
/* check next page if needed */ |
629 | 629 |
virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK; |
630 | 630 |
phys_page2 = -1; |
... | ... | |
634 | 634 |
tb_link_phys(tb, phys_pc, phys_page2); |
635 | 635 |
} |
636 | 636 |
#endif |
637 |
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637 |
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638 | 638 |
/* invalidate all TBs which intersect with the target physical page |
639 | 639 |
starting in range [start;end[. NOTE: start and end must refer to |
640 | 640 |
the same physical page. 'is_cpu_write_access' should be true if called |
... | ... | |
700 | 700 |
that the modification is after the current PC, but it |
701 | 701 |
would require a specialized function to partially |
702 | 702 |
restore the CPU state */ |
703 |
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703 |
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704 | 704 |
current_tb_modified = 1; |
705 | 705 |
cpu_restore_state(current_tb, env, |
706 | 706 |
env->mem_write_pc, NULL); |
... | ... | |
819 | 819 |
that the modification is after the current PC, but it |
820 | 820 |
would require a specialized function to partially |
821 | 821 |
restore the CPU state */ |
822 |
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822 |
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823 | 823 |
current_tb_modified = 1; |
824 | 824 |
cpu_restore_state(current_tb, env, pc, puc); |
825 | 825 |
#if defined(TARGET_I386) |
... | ... | |
1024 | 1024 |
} |
1025 | 1025 |
*ptb = tb->jmp_next[n]; |
1026 | 1026 |
tb->jmp_next[n] = NULL; |
1027 |
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1027 |
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1028 | 1028 |
/* suppress the jump to next tb in generated code */ |
1029 | 1029 |
tb_reset_jump(tb, n); |
1030 | 1030 |
|
... | ... | |
1103 | 1103 |
{ |
1104 | 1104 |
#if defined(TARGET_HAS_ICE) |
1105 | 1105 |
int i; |
1106 |
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1106 |
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1107 | 1107 |
for(i = 0; i < env->nb_breakpoints; i++) { |
1108 | 1108 |
if (env->breakpoints[i] == pc) |
1109 | 1109 |
return 0; |
... | ... | |
1112 | 1112 |
if (env->nb_breakpoints >= MAX_BREAKPOINTS) |
1113 | 1113 |
return -1; |
1114 | 1114 |
env->breakpoints[env->nb_breakpoints++] = pc; |
1115 |
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1115 |
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1116 | 1116 |
breakpoint_invalidate(env, pc); |
1117 | 1117 |
return 0; |
1118 | 1118 |
#else |
... | ... | |
1249 | 1249 |
return 0; |
1250 | 1250 |
return memcmp(s1, s2, n) == 0; |
1251 | 1251 |
} |
1252 |
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1252 |
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1253 | 1253 |
/* takes a comma separated list of log masks. Return 0 if error. */ |
1254 | 1254 |
int cpu_str_to_log_mask(const char *str) |
1255 | 1255 |
{ |
... | ... | |
1703 | 1703 |
/* if code is present, we only map as read only and save the |
1704 | 1704 |
original mapping */ |
1705 | 1705 |
VirtPageDesc *vp; |
1706 |
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1706 |
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1707 | 1707 |
vp = virt_page_find_alloc(vaddr >> TARGET_PAGE_BITS, 1); |
1708 | 1708 |
vp->phys_addr = pd; |
1709 | 1709 |
vp->prot = prot; |
... | ... | |
2008 | 2008 |
} |
2009 | 2009 |
} |
2010 | 2010 |
} |
2011 |
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2011 |
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2012 | 2012 |
/* since each CPU stores ram addresses in its TLB cache, we must |
2013 | 2013 |
reset the modified entries */ |
2014 | 2014 |
/* XXX: slow ! */ |
... | ... | |
2492 | 2492 |
target_phys_addr_t page; |
2493 | 2493 |
unsigned long pd; |
2494 | 2494 |
PhysPageDesc *p; |
2495 |
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2495 |
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2496 | 2496 |
while (len > 0) { |
2497 | 2497 |
page = addr & TARGET_PAGE_MASK; |
2498 | 2498 |
l = (page + TARGET_PAGE_SIZE) - addr; |
... | ... | |
2504 | 2504 |
} else { |
2505 | 2505 |
pd = p->phys_offset; |
2506 | 2506 |
} |
2507 |
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2507 |
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2508 | 2508 |
if (is_write) { |
2509 | 2509 |
if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) { |
2510 | 2510 |
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
... | ... | |
2583 | 2583 |
target_phys_addr_t page; |
2584 | 2584 |
unsigned long pd; |
2585 | 2585 |
PhysPageDesc *p; |
2586 |
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2586 |
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2587 | 2587 |
while (len > 0) { |
2588 | 2588 |
page = addr & TARGET_PAGE_MASK; |
2589 | 2589 |
l = (page + TARGET_PAGE_SIZE) - addr; |
... | ... | |
2595 | 2595 |
} else { |
2596 | 2596 |
pd = p->phys_offset; |
2597 | 2597 |
} |
2598 |
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2598 |
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2599 | 2599 |
if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM && |
2600 | 2600 |
(pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM && |
2601 | 2601 |
!(pd & IO_MEM_ROMD)) { |
... | ... | |
2629 | 2629 |
} else { |
2630 | 2630 |
pd = p->phys_offset; |
2631 | 2631 |
} |
2632 |
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2632 |
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2633 | 2633 |
if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && |
2634 | 2634 |
!(pd & IO_MEM_ROMD)) { |
2635 | 2635 |
/* I/O case */ |
... | ... | |
2659 | 2659 |
} else { |
2660 | 2660 |
pd = p->phys_offset; |
2661 | 2661 |
} |
2662 |
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2662 |
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2663 | 2663 |
if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && |
2664 | 2664 |
!(pd & IO_MEM_ROMD)) { |
2665 | 2665 |
/* I/O case */ |
... | ... | |
2712 | 2712 |
} else { |
2713 | 2713 |
pd = p->phys_offset; |
2714 | 2714 |
} |
2715 |
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2715 |
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2716 | 2716 |
if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) { |
2717 | 2717 |
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
2718 | 2718 |
io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val); |
... | ... | |
2736 | 2736 |
} else { |
2737 | 2737 |
pd = p->phys_offset; |
2738 | 2738 |
} |
2739 |
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2739 |
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2740 | 2740 |
if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) { |
2741 | 2741 |
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
2742 | 2742 |
#ifdef TARGET_WORDS_BIGENDIAN |
... | ... | |
2767 | 2767 |
} else { |
2768 | 2768 |
pd = p->phys_offset; |
2769 | 2769 |
} |
2770 |
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2770 |
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2771 | 2771 |
if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) { |
2772 | 2772 |
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
2773 | 2773 |
io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val); |
... | ... | |
2842 | 2842 |
int i, target_code_size, max_target_code_size; |
2843 | 2843 |
int direct_jmp_count, direct_jmp2_count, cross_page; |
2844 | 2844 |
TranslationBlock *tb; |
2845 |
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2845 |
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2846 | 2846 |
target_code_size = 0; |
2847 | 2847 |
max_target_code_size = 0; |
2848 | 2848 |
cross_page = 0; |
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