Archipelago » qemu

    {

        SYSTEM_INFO system_info;

        DWORD old_protect;

        GetSystemInfo(&system_info);

        qemu_real_host_page_size = system_info.dwPageSize;

        VirtualProtect(code_gen_buffer, sizeof(code_gen_buffer),

                       PAGE_EXECUTE_READWRITE, &old_protect);

    }

        start = (unsigned long)code_gen_buffer;

        start &= ~(qemu_real_host_page_size - 1);

        end = (unsigned long)code_gen_buffer + sizeof(code_gen_buffer);

        end += qemu_real_host_page_size - 1;

        end &= ~(qemu_real_host_page_size - 1);

        mprotect((void *)start, end - start,

                 PROT_READ | PROT_WRITE | PROT_EXEC);

    }

           nb_tbs > 0 ? (code_gen_ptr - code_gen_buffer) / nb_tbs : 0);

#endif

    nb_tbs = 0;

    for(env = first_cpu; env != NULL; env = env->next_cpu) {

        memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));

    }

{

    TranslationBlock *tb;

    int i, flags1, flags2;

    for(i = 0;i < CODE_GEN_PHYS_HASH_SIZE; i++) {

        for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {

            flags1 = page_get_flags(tb->pc);

    unsigned int h, n1;

    target_ulong phys_pc;

    TranslationBlock *tb1, *tb2;

    /* remove the TB from the hash list */

    phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);

    h = tb_phys_hash_func(phys_pc);

{

    int n, tb_start, tb_end;

    TranslationBlock *tb;

    p->code_bitmap = qemu_malloc(TARGET_PAGE_SIZE / 8);

    if (!p->code_bitmap)

        return;

    tb->cflags = cflags;

    cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size);

    code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));

    /* check next page if needed */

    virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;

    phys_page2 = -1;

    tb_link_phys(tb, phys_pc, phys_page2);

}

#endif

/* invalidate all TBs which intersect with the target physical page

   starting in range [start;end[. NOTE: start and end must refer to

   the same physical page. 'is_cpu_write_access' should be true if called

                that the modification is after the current PC, but it

                would require a specialized function to partially

                restore the CPU state */

                current_tb_modified = 1;

                cpu_restore_state(current_tb, env,

                                  env->mem_write_pc, NULL);

                   that the modification is after the current PC, but it

                   would require a specialized function to partially

                   restore the CPU state */

            current_tb_modified = 1;

            cpu_restore_state(current_tb, env, pc, puc);

#if defined(TARGET_I386)

        }

        *ptb = tb->jmp_next[n];

        tb->jmp_next[n] = NULL;

        /* suppress the jump to next tb in generated code */

        tb_reset_jump(tb, n);

{

#if defined(TARGET_HAS_ICE)

    int i;

    for(i = 0; i < env->nb_breakpoints; i++) {

        if (env->breakpoints[i] == pc)

            return 0;

    if (env->nb_breakpoints >= MAX_BREAKPOINTS)

        return -1;

    env->breakpoints[env->nb_breakpoints++] = pc;

    breakpoint_invalidate(env, pc);

    return 0;

#else

        return 0;

    return memcmp(s1, s2, n) == 0;

}

/* takes a comma separated list of log masks. Return 0 if error. */

int cpu_str_to_log_mask(const char *str)

{

                        /* if code is present, we only map as read only and save the

                           original mapping */

                        VirtPageDesc *vp;

                        vp = virt_page_find_alloc(vaddr >> TARGET_PAGE_BITS, 1);

                        vp->phys_addr = pd;

                        vp->prot = prot;

            }

        }

    }

    /* since each CPU stores ram addresses in its TLB cache, we must

       reset the modified entries */

    /* XXX: slow ! */

    target_phys_addr_t page;

    unsigned long pd;

    PhysPageDesc *p;

    while (len > 0) {

        page = addr & TARGET_PAGE_MASK;

        l = (page + TARGET_PAGE_SIZE) - addr;

        } else {

            pd = p->phys_offset;

        }

        if (is_write) {

            if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {

                io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

    target_phys_addr_t page;

    unsigned long pd;

    PhysPageDesc *p;

    while (len > 0) {

        page = addr & TARGET_PAGE_MASK;

        l = (page + TARGET_PAGE_SIZE) - addr;

        } else {

            pd = p->phys_offset;

        }

        if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&

            (pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM &&

            !(pd & IO_MEM_ROMD)) {

    } else {

        pd = p->phys_offset;

    }

    if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&

        !(pd & IO_MEM_ROMD)) {

        /* I/O case */

    } else {

        pd = p->phys_offset;

    }

    if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&

        !(pd & IO_MEM_ROMD)) {

        /* I/O case */

    } else {

        pd = p->phys_offset;

    }

    if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {

        io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

        io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);

    } else {

        pd = p->phys_offset;

    }

    if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {

        io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

#ifdef TARGET_WORDS_BIGENDIAN

    } else {

        pd = p->phys_offset;

    }

    if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {

        io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

        io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);

    int i, target_code_size, max_target_code_size;

    int direct_jmp_count, direct_jmp2_count, cross_page;

    TranslationBlock *tb;

    target_code_size = 0;

    max_target_code_size = 0;

    cross_page = 0;