Revision 3b46e624 target-arm/cpu.h
b/target-arm/cpu.h | ||
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uint32_t banked_spsr[6]; |
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uint32_t banked_r13[6]; |
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uint32_t banked_r14[6]; |
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/* These hold r8-r12. */ |
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uint32_t usr_regs[5]; |
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uint32_t fiq_regs[5]; |
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/* cpsr flag cache for faster execution */ |
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uint32_t CF; /* 0 or 1 */ |
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uint32_t VF; /* V is the bit 31. All other bits are undefined */ |
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/* Temporary variables if we don't have spare fp regs. */ |
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float32 tmp0s, tmp1s; |
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float64 tmp0d, tmp1d; |
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float_status fp_status; |
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} vfp; |
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