Archipelago » qemu

    1, /* bic */

    1, /* mvn */

};

static GenOpFunc1 *gen_shift_T1_im[4] = {

    gen_op_shll_T1_im,

    gen_op_shrl_T1_im,

                                        int extra)

{

    int val, rm;

    if (insn & (1 << 22)) {

        /* immediate */

        val = (insn & 0xf) | ((insn >> 4) & 0xf0);

            delta_m = 0;

            delta_d = 0;

            bank_mask = 0;

            if (veclen > 0) {

                if (dp)

                    bank_mask = 0xc;

static void disas_arm_insn(CPUState * env, DisasContext *s)

{

    unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh;

    insn = ldl_code(s->pc);

    s->pc += 4;

    cond = insn >> 28;

    if (cond == 0xf){

        /* Unconditional instructions.  */

                (insn & 0x00000090) != 0x90) ||

               ((insn & 0x0e000000) == (1 << 25))) {

        int set_cc, logic_cc, shiftop;

        op1 = (insn >> 21) & 0xf;

        set_cc = (insn >> 20) & 1;

        logic_cc = table_logic_cc[op1] & set_cc;

                    } else {

                        /* SWP instruction */

                        rm = (insn) & 0xf;

                        gen_movl_T0_reg(s, rm);

                        gen_movl_T1_reg(s, rn);

                        if (insn & (1 << 22)) {

                }

                rn = (insn >> 16) & 0xf;

                gen_movl_T1_reg(s, rn);

                /* compute total size */

                loaded_base = 0;

                n = 0;

        case 0xb:

            {

                int32_t offset;

                /* branch (and link) */

                val = (int32_t)s->pc;

                if (insn & (1 << 24)) {

        val = (uint32_t)s->pc + 2;

        gen_op_movl_T1_im(val | 1);

        gen_movl_reg_T1(s, 14);

        val += offset << 1;

        if (insn & (1 << 12)) {

            /* bl */

    int j, lj;

    target_ulong pc_start;

    uint32_t next_page_start;

    /* generate intermediate code */

    pc_start = tb->pc;

    dc->tb = tb;

    gen_opc_ptr = gen_opc_buf;