Revision 3b46e624 target-i386/translate-copy.c

b/target-i386/translate-copy.c
63 63
    /* code output */
64 64
    uint8_t *gen_code_ptr;
65 65
    uint8_t *gen_code_start;
66
   
66

  
67 67
    /* current block context */
68 68
    target_ulong cs_base; /* base of CS segment */
69 69
    int pe;     /* protected mode */
......
155 155
    gb(s, 0xe9); /* jmp */
156 156
    tb->tb_jmp_offset[1] = s->gen_code_ptr - s->gen_code_start;
157 157
    gl(s, 0);
158
   
158

  
159 159
    tb->tb_next_offset[0] = s->gen_code_ptr - s->gen_code_start;
160 160
    gen_movl_addr_im(s, CPU_FIELD_OFFSET(eip), target_eip);
161 161
    gen_movl_addr_im(s, CPU_FIELD_OFFSET(tmp0), (uint32_t)tb);
......
194 194
        base = rm;
195 195
        index = 0;
196 196
        scale = 0;
197
       
197

  
198 198
        if (base == 4) {
199 199
            havesib = 1;
200 200
            code = ldub_code(s->pc++);
......
222 222
            s->pc += 4;
223 223
            break;
224 224
        }
225
       
225

  
226 226
    } else {
227 227
        switch (mod) {
228 228
        case 0:
......
248 248
static inline void parse_modrm(DisasContext *s, int modrm)
249 249
{
250 250
    if ((modrm & 0xc0) != 0xc0)
251
        gen_lea_modrm(s, modrm);       
251
        gen_lea_modrm(s, modrm);
252 252
}
253 253

  
254 254
static inline uint32_t insn_get(DisasContext *s, int ot)
......
351 351
        /* extended op code */
352 352
        b = ldub_code(s->pc++) | 0x100;
353 353
        goto reswitch;
354
       
354

  
355 355
        /**************************/
356 356
        /* arith & logic */
357 357
    case 0x00 ... 0x05:
......
370 370
                ot = OT_BYTE;
371 371
            else
372 372
                ot = dflag ? OT_LONG : OT_WORD;
373
           
373

  
374 374
            switch(f) {
375 375
            case 0: /* OP Ev, Gv */
376 376
                modrm = ldub_code(s->pc++);
......
396 396
                ot = OT_BYTE;
397 397
            else
398 398
                ot = dflag ? OT_LONG : OT_WORD;
399
           
399

  
400 400
            modrm = ldub_code(s->pc++);
401 401
            parse_modrm(s, modrm);
402 402

  
......
506 506
            ot = dflag ? OT_LONG : OT_WORD;
507 507
        insn_get(s, ot);
508 508
        break;
509
       
509

  
510 510
    case 0x98: /* CWDE/CBW */
511 511
        break;
512 512
    case 0x99: /* CDQ/CWD */
......
527 527

  
528 528
    case 0x84: /* test Ev, Gv */
529 529
    case 0x85:
530
       
530

  
531 531
    case 0x1c0:
532 532
    case 0x1c1: /* xadd Ev, Gv */
533 533

  
......
583 583
            goto illegal_op;
584 584
        parse_modrm(s, modrm);
585 585
        break;
586
       
586

  
587 587
        /**************************/
588 588
        /* push/pop */
589 589
    case 0x50 ... 0x57: /* push */
......
850 850
            goto illegal_op;
851 851
        parse_modrm(s, modrm);
852 852
        break;
853
       
853

  
854 854
    case 0xa0: /* mov EAX, Ov */
855 855
    case 0xa1:
856 856
    case 0xa2: /* mov Ov, EAX */
......
888 888
        parse_modrm(s, modrm);
889 889
        ldub_code(s->pc++);
890 890
        break;
891
       
891

  
892 892
        /************************/
893 893
        /* string ops */
894 894

  
895 895
    case 0xa4: /* movsS */
896 896
    case 0xa5:
897 897
        break;
898
       
898

  
899 899
    case 0xaa: /* stosS */
900 900
    case 0xab:
901 901
        break;
......
955 955

  
956 956
    case 0xc3: /* ret */
957 957
        gb(s, CPU_SEG);
958
        if (!s->dflag) 
958
        if (!s->dflag)
959 959
            gb(s, 0x66); /* d16 */
960 960
        gb(s, 0x8f); /* pop addr */
961 961
        gb(s, 0x05);
......
1244 1244
            break;
1245 1245
        }
1246 1246
    }
1247
   
1247

  
1248 1248
#ifdef DEBUG_DISAS
1249 1249
    if (loglevel & CPU_LOG_TB_IN_ASM) {
1250 1250
        fprintf(logfile, "----------------\n");
......
1304 1304
        return ret;
1305 1305
    /* restore all the CPU state from the CPU context from the
1306 1306
       signal. The FPU context stays in the host CPU. */
1307
   
1307

  
1308 1308
    env->regs[R_EAX] = uc->uc_mcontext.gregs[REG_EAX];
1309 1309
    env->regs[R_ECX] = uc->uc_mcontext.gregs[REG_ECX];
1310 1310
    env->regs[R_EDX] = uc->uc_mcontext.gregs[REG_EDX];

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