Revision 3b46e624 tests/test-i386.c

b/tests/test-i386.c
739 739
        uint32_t ignored[4];
740 740
        long double fpregs[8];
741 741
    } float_env32;
742
   
742

  
743 743
    asm volatile ("fnstenv %0\n" : : "m" (float_env32));
744 744
    float_env32.fpus &= ~0x7f;
745 745
    asm volatile ("fldenv %0\n" : : "m" (float_env32));
......
1041 1041
    TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
1042 1042
    TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
1043 1043
    TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
1044
   
1044

  
1045 1045
    TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
1046 1046
    TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
1047 1047
    TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
......
1381 1381
        /* NOTE: we assume that &func_lret < 4GB */
1382 1382
        desc.offset = (long)&func_lret;
1383 1383
        desc.seg = cs_sel;
1384
       
1384

  
1385 1385
        asm volatile ("xor %%rax, %%rax\n"
1386 1386
                      "rex64 lcall %1\n"
1387 1387
                      : "=a" (res)
......
1562 1562
        case VM86_INTx:
1563 1563
            {
1564 1564
                int int_num, ah, v;
1565
               
1565

  
1566 1566
                int_num = VM86_ARG(ret);
1567 1567
                if (int_num != 0x21)
1568 1568
                    goto unknown_int;
......
1665 1665
{
1666 1666
    struct sigaction act;
1667 1667
    volatile int val;
1668
   
1668

  
1669 1669
    act.sa_sigaction = sig_handler;
1670 1670
    sigemptyset(&act.sa_mask);
1671 1671
    act.sa_flags = SA_SIGINFO | SA_NODEFER;
......
1718 1718
        ldt.seg_not_present = 1;
1719 1719
        ldt.useable = 1;
1720 1720
        modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1721
       
1721

  
1722 1722
        if (setjmp(jmp_env) == 0) {
1723 1723
            /* segment not present */
1724 1724
            asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
......
1743 1743
        /* read from an invalid address */
1744 1744
        v1 = *(char *)0x1234;
1745 1745
    }
1746
   
1746

  
1747 1747
    /* test illegal instruction reporting */
1748 1748
    printf("UD2 exception:\n");
1749 1749
    if (setjmp(jmp_env) == 0) {
......
1755 1755
        /* now execute an invalid instruction */
1756 1756
        asm volatile("lock nop");
1757 1757
    }
1758
   
1758

  
1759 1759
    printf("INT exception:\n");
1760 1760
    if (setjmp(jmp_env) == 0) {
1761 1761
        asm volatile ("int $0xfd");
......
1884 1884
                  "rep cmpsb\n"
1885 1885
                  "movl $4, %%ecx\n"
1886 1886
                  "rep cmpsb\n"
1887
                 
1887

  
1888 1888
                  /* getpid() syscall: single step should skip one
1889 1889
                     instruction */
1890 1890
                  "movl $20, %%eax\n"
1891 1891
                  "int $0x80\n"
1892 1892
                  "movl $0, %%eax\n"
1893
                 
1893

  
1894 1894
                  /* when modifying SS, trace is not done on the next
1895 1895
                     instruction */
1896 1896
                  "movl %%ss, %%ecx\n"
......
1906 1906
                  "popl %%ss\n"
1907 1907
                  "addl $1, %0\n"
1908 1908
                  "movl $1, %%eax\n"
1909
                 
1909

  
1910 1910
                  "pushf\n"
1911 1911
                  "andl $~0x00100, (%%esp)\n"
1912 1912
                  "popf\n"
......
2341 2341

  
2342 2342
    MMX_OP2(pmulhuw);
2343 2343
    MMX_OP2(pmulhw);
2344
   
2344

  
2345 2345
    MMX_OP2(psubsb);
2346 2346
    MMX_OP2(psubsw);
2347 2347
    MMX_OP2(pminsw);
......
2380 2380

  
2381 2381
    asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2382 2382
    printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2383
   
2383

  
2384 2384
    asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2385 2385
    printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2386 2386

  
......
2506 2506
        SSE_OPS(cmpnlt);
2507 2507
        SSE_OPS(cmpnle);
2508 2508
        SSE_OPS(cmpord);
2509
       
2510
       
2509

  
2510

  
2511 2511
        a.d[0] = 2.7;
2512 2512
        a.d[1] = -3.4;
2513 2513
        b.d[0] = 45.7;

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