Revision 3c4fe427

b/target-cris/helper.c
248 248
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
249 249
{
250 250
	uint32_t phy = addr;
251
	uint32_t r_cause, r_tlb_sel, rand_lfsr;
251 252
	struct cris_mmu_result res;
252 253
	int miss;
254

  
255
	/* Save MMU state.  */
256
	r_tlb_sel = env->sregs[SFR_RW_MM_TLB_SEL];
257
	r_cause = env->sregs[SFR_R_MM_CAUSE];
258
	rand_lfsr = env->mmu_rand_lfsr;
259

  
253 260
	miss = cris_mmu_translate(&res, env, addr, 0, 0);
261
	/* If D TLB misses, try I TLB.  */
262
	if (miss) {
263
		miss = cris_mmu_translate(&res, env, addr, 2, 0);
264
	}
265

  
266
	/* Restore MMU state.  */
267
	env->sregs[SFR_RW_MM_TLB_SEL] = r_tlb_sel;
268
	env->sregs[SFR_R_MM_CAUSE] = r_cause;
269
	env->mmu_rand_lfsr = rand_lfsr;
270

  
254 271
	if (!miss)
255 272
		phy = res.phy;
256 273
	D(fprintf(stderr, "%s %x -> %x\n", __func__, addr, phy));

Also available in: Unified diff