Revision 3cbee15b hw/ppc.c

b/hw/ppc.c
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 * THE SOFTWARE.
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 */
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#include "vl.h"
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#include "m48t59.h"
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//#define PPC_DEBUG_IRQ
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//#define PPC_DEBUG_TB
......
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/*****************************************************************************/
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/* NVRAM helpers */
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void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value)
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static inline uint32_t nvram_read (nvram_t *nvram, uint32_t addr)
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{
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    m48t59_write(nvram, addr, value);
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    return (*nvram->read_fn)(nvram->opaque, addr);;
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}
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uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr)
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static inline void nvram_write (nvram_t *nvram, uint32_t addr, uint32_t val)
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{
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    return m48t59_read(nvram, addr);
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    (*nvram->write_fn)(nvram->opaque, addr, val);
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}
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void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value)
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void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value)
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{
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    m48t59_write(nvram, addr, value >> 8);
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    m48t59_write(nvram, addr + 1, value & 0xFF);
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    nvram_write(nvram, addr, value);
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}
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uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr)
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uint8_t NVRAM_get_byte (nvram_t *nvram, uint32_t addr)
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{
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    return nvram_read(nvram, addr);
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}
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void NVRAM_set_word (nvram_t *nvram, uint32_t addr, uint16_t value)
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{
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    nvram_write(nvram, addr, value >> 8);
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    nvram_write(nvram, addr + 1, value & 0xFF);
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}
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uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr)
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{
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    uint16_t tmp;
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    tmp = m48t59_read(nvram, addr) << 8;
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    tmp |= m48t59_read(nvram, addr + 1);
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    tmp = nvram_read(nvram, addr) << 8;
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    tmp |= nvram_read(nvram, addr + 1);
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    return tmp;
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}
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void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value)
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void NVRAM_set_lword (nvram_t *nvram, uint32_t addr, uint32_t value)
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{
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    m48t59_write(nvram, addr, value >> 24);
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    m48t59_write(nvram, addr + 1, (value >> 16) & 0xFF);
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    m48t59_write(nvram, addr + 2, (value >> 8) & 0xFF);
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    m48t59_write(nvram, addr + 3, value & 0xFF);
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    nvram_write(nvram, addr, value >> 24);
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    nvram_write(nvram, addr + 1, (value >> 16) & 0xFF);
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    nvram_write(nvram, addr + 2, (value >> 8) & 0xFF);
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    nvram_write(nvram, addr + 3, value & 0xFF);
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}
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uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr)
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uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr)
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{
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    uint32_t tmp;
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    tmp = m48t59_read(nvram, addr) << 24;
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    tmp |= m48t59_read(nvram, addr + 1) << 16;
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    tmp |= m48t59_read(nvram, addr + 2) << 8;
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    tmp |= m48t59_read(nvram, addr + 3);
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    tmp = nvram_read(nvram, addr) << 24;
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    tmp |= nvram_read(nvram, addr + 1) << 16;
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    tmp |= nvram_read(nvram, addr + 2) << 8;
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    tmp |= nvram_read(nvram, addr + 3);
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    return tmp;
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}
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void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
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void NVRAM_set_string (nvram_t *nvram, uint32_t addr,
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                       const unsigned char *str, uint32_t max)
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{
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    int i;
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    for (i = 0; i < max && str[i] != '\0'; i++) {
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        m48t59_write(nvram, addr + i, str[i]);
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        nvram_write(nvram, addr + i, str[i]);
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    }
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    m48t59_write(nvram, addr + max - 1, '\0');
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    nvram_write(nvram, addr + i, str[i]);
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    nvram_write(nvram, addr + max - 1, '\0');
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}
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int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max)
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int NVRAM_get_string (nvram_t *nvram, uint8_t *dst, uint16_t addr, int max)
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{
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    int i;
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......
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    return tmp;
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}
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uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count)
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uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
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{
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    uint32_t i;
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    uint16_t crc = 0xFFFF;
......
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#define CMDLINE_ADDR 0x017ff000
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int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
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int PPC_NVRAM_set_params (nvram_t *nvram, uint16_t NVRAM_size,
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                          const unsigned char *arch,
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                          uint32_t RAM_size, int boot_device,
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                          uint32_t kernel_image, uint32_t kernel_size,
......
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    NVRAM_set_word(nvram,   0x56, height);
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    NVRAM_set_word(nvram,   0x58, depth);
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    crc = NVRAM_compute_crc(nvram, 0x00, 0xF8);
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    NVRAM_set_word(nvram,  0xFC, crc);
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    NVRAM_set_word(nvram,   0xFC, crc);
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    return 0;
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}

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