Revision 3cd7d1dd target-ppc/cpu.h
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#include <inttypes.h> |
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#if defined (TARGET_PPC64) |
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/* PowerPC 64 definitions */ |
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typedef uint64_t ppc_gpr_t; |
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#define TARGET_GPR_BITS 64 |
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#define TARGET_LONG_BITS 64 |
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#define REGX "%016" PRIx64 |
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#define TARGET_PAGE_BITS 12 |
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#elif defined(TARGET_PPCEMB) |
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/* BookE have 36 bits physical address space */ |
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#define TARGET_PHYS_ADDR_BITS 64 |
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/* GPR are 64 bits: used by vector extension */ |
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typedef uint64_t ppc_gpr_t; |
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#define TARGET_GPR_BITS 64 |
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#define TARGET_LONG_BITS 32 |
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#define REGX "%016" PRIx64 |
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#if defined(CONFIG_USER_ONLY) |
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/* It looks like a lot of Linux programs assume page size |
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* is 4kB long. This is evil, but we have to deal with it... |
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*/ |
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#define TARGET_PAGE_BITS 12 |
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#else |
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/* Pages can be 1 kB small */ |
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#define TARGET_PAGE_BITS 10 |
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#endif |
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#else |
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#else /* defined (TARGET_PPC64) */ |
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/* PowerPC 32 definitions */ |
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#if (HOST_LONG_BITS >= 64) |
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/* When using 64 bits temporary registers, |
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* we can use 64 bits GPR with no extra cost |
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* It's even an optimization as it will prevent
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* It's even an optimization as this will prevent
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* the compiler to do unuseful masking in the micro-ops. |
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*/ |
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typedef uint64_t ppc_gpr_t; |
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#define TARGET_GPR_BITS 64 |
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#define REGX "%08" PRIx64 |
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#else |
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#else /* (HOST_LONG_BITS >= 64) */
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typedef uint32_t ppc_gpr_t; |
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#define TARGET_GPR_BITS 32 |
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#define REGX "%08" PRIx32 |
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#endif |
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#endif /* (HOST_LONG_BITS >= 64) */ |
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#define TARGET_LONG_BITS 32 |
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#if defined(TARGET_PPCEMB) |
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/* Specific definitions for PowerPC embedded */ |
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/* BookE have 36 bits physical address space */ |
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#define TARGET_PHYS_ADDR_BITS 64 |
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#if defined(CONFIG_USER_ONLY) |
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/* It looks like a lot of Linux programs assume page size |
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* is 4kB long. This is evil, but we have to deal with it... |
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*/ |
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#define TARGET_PAGE_BITS 12 |
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#endif |
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#else /* defined(CONFIG_USER_ONLY) */ |
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/* Pages can be 1 kB small */ |
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#define TARGET_PAGE_BITS 10 |
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#endif /* defined(CONFIG_USER_ONLY) */ |
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#else /* defined(TARGET_PPCEMB) */ |
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/* "standard" PowerPC 32 definitions */ |
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#define TARGET_PAGE_BITS 12 |
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#endif /* defined(TARGET_PPCEMB) */ |
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#endif /* defined (TARGET_PPC64) */ |
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#include "cpu-defs.h" |
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|
... | ... | |
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POWERPC_EXCP_ITLB = 14, /* Instruction TLB error */ |
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POWERPC_EXCP_DEBUG = 15, /* Debug interrupt */ |
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/* Vectors 16 to 31 are reserved */ |
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#if defined(TARGET_PPCEMB) |
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POWERPC_EXCP_SPEU = 32, /* SPE/embedded floating-point unavailable */ |
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POWERPC_EXCP_EFPDI = 33, /* Embedded floating-point data interrupt */ |
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POWERPC_EXCP_EFPRI = 34, /* Embedded floating-point round interrupt */ |
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POWERPC_EXCP_EPERFM = 35, /* Embedded performance monitor interrupt */ |
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POWERPC_EXCP_DOORI = 36, /* Embedded doorbell interrupt */ |
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POWERPC_EXCP_DOORCI = 37, /* Embedded doorbell critical interrupt */ |
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#endif /* defined(TARGET_PPCEMB) */ |
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/* Vectors 38 to 63 are reserved */ |
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/* Exceptions defined in the PowerPC server specification */ |
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POWERPC_EXCP_RESET = 64, /* System reset exception */ |
... | ... | |
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/* general purpose registers */ |
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ppc_gpr_t gpr[32]; |
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#if TARGET_GPR_BITS < 64 |
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/* Storage for GPR MSB, used by the SPE extension */ |
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ppc_gpr_t gprh[32]; |
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#endif |
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/* LR */ |
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target_ulong lr; |
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/* CTR */ |
... | ... | |
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/* Altivec registers */ |
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ppc_avr_t avr[32]; |
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uint32_t vscr; |
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#if defined(TARGET_PPCEMB) |
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/* SPE registers */ |
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ppc_gpr_t spe_acc; |
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float_status spe_status; |
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uint32_t spe_fscr; |
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#endif |
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/* Internal devices resources */ |
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/* Time base and decrementer */ |
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