Archipelago » qemu

/*

 *  qemu user main

 *

 *  Copyright (c) 2003 Fabrice Bellard

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License as published by

 *  the Free Software Foundation; either version 2 of the License, or

 *  (at your option) any later version.

 *

 *  This program is distributed in the hope that it will be useful,

 *  but WITHOUT ANY WARRANTY; without even the implied warranty of

 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *  GNU General Public License for more details.

 *

 *  You should have received a copy of the GNU General Public License

 *  along with this program; if not, write to the Free Software

 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

 */

#include <stdlib.h>

#include <stdio.h>

#include <stdarg.h>

#include <string.h>

#include <errno.h>

#include <unistd.h>

#include "qemu.h"

#define DEBUG_LOGFILE "/tmp/qemu.log"

#ifdef __APPLE__

#include <crt_externs.h>

# define environ  (*_NSGetEnviron())

#endif

static const char *interp_prefix = CONFIG_QEMU_PREFIX;

const char *qemu_uname_release = CONFIG_UNAME_RELEASE;

#if defined(__i386__) && !defined(CONFIG_STATIC)

/* Force usage of an ELF interpreter even if it is an ELF shared

   object ! */

const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";

#endif

/* for recent libc, we add these dummy symbols which are not declared

   when generating a linked object (bug in ld ?) */

#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)

long __preinit_array_start[0];

long __preinit_array_end[0];

long __init_array_start[0];

long __init_array_end[0];

long __fini_array_start[0];

long __fini_array_end[0];

#endif

/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so

   we allocate a bigger stack. Need a better solution, for example

   by remapping the process stack directly at the right place */

unsigned long x86_stack_size = 512 * 1024;

void gemu_log(const char *fmt, ...)

{

    va_list ap;

    va_start(ap, fmt);

    vfprintf(stderr, fmt, ap);

    va_end(ap);

}

void cpu_outb(CPUState *env, int addr, int val)

{

    fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);

}

void cpu_outw(CPUState *env, int addr, int val)

{

    fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);

}

void cpu_outl(CPUState *env, int addr, int val)

{

    fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);

}

int cpu_inb(CPUState *env, int addr)

{

    fprintf(stderr, "inb: port=0x%04x\n", addr);

    return 0;

}

int cpu_inw(CPUState *env, int addr)

{

    fprintf(stderr, "inw: port=0x%04x\n", addr);

    return 0;

}

int cpu_inl(CPUState *env, int addr)

{

    fprintf(stderr, "inl: port=0x%04x\n", addr);

    return 0;

}

int cpu_get_pic_interrupt(CPUState *env)

{

    return -1;

}

/* timers for rdtsc */

#if 0

static uint64_t emu_time;

int64_t cpu_get_real_ticks(void)

{

    return emu_time++;

}

#endif

#ifdef TARGET_I386

/***********************************************************/

/* CPUX86 core interface */

void cpu_smm_update(CPUState *env)

{

}

uint64_t cpu_get_tsc(CPUX86State *env)

{

    return cpu_get_real_ticks();

}

static void write_dt(void *ptr, unsigned long addr, unsigned long limit,

                     int flags)

{

    unsigned int e1, e2;

    uint32_t *p;

    e1 = (addr << 16) | (limit & 0xffff);

    e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);

    e2 |= flags;

    p = ptr;

    p[0] = tswapl(e1);

    p[1] = tswapl(e2);

}

static void set_gate(void *ptr, unsigned int type, unsigned int dpl,

                     unsigned long addr, unsigned int sel)

{

    unsigned int e1, e2;

    uint32_t *p;

    e1 = (addr & 0xffff) | (sel << 16);

    e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);

    p = ptr;

    p[0] = tswapl(e1);

    p[1] = tswapl(e2);

}

uint64_t gdt_table[6];

uint64_t idt_table[256];

/* only dpl matters as we do only user space emulation */

static void set_idt(int n, unsigned int dpl)

{

    set_gate(idt_table + n, 0, dpl, 0, 0);

}

void cpu_loop(CPUX86State *env)

{

    int trapnr;

    target_ulong pc;

    target_siginfo_t info;

    for(;;) {

        trapnr = cpu_x86_exec(env);

        switch(trapnr) {

        case 0x80:

            /* linux syscall */

            env->regs[R_EAX] = do_syscall(env,

                                          env->regs[R_EAX],

                                          env->regs[R_EBX],

                                          env->regs[R_ECX],

                                          env->regs[R_EDX],

                                          env->regs[R_ESI],

                                          env->regs[R_EDI],

                                          env->regs[R_EBP]);

            break;

        case EXCP0B_NOSEG:

        case EXCP0C_STACK:

            info.si_signo = SIGBUS;

            info.si_errno = 0;

            info.si_code = TARGET_SI_KERNEL;

            info._sifields._sigfault._addr = 0;

            queue_signal(info.si_signo, &info);

            break;

        case EXCP0D_GPF:

#ifndef TARGET_X86_64

            if (env->eflags & VM_MASK) {

                handle_vm86_fault(env);

            } else

#endif

            {

                info.si_signo = SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SI_KERNEL;

                info._sifields._sigfault._addr = 0;

                queue_signal(info.si_signo, &info);

            }

            break;

        case EXCP0E_PAGE:

            info.si_signo = SIGSEGV;

            info.si_errno = 0;

            if (!(env->error_code & 1))

                info.si_code = TARGET_SEGV_MAPERR;

            else

                info.si_code = TARGET_SEGV_ACCERR;

            info._sifields._sigfault._addr = env->cr[2];

            queue_signal(info.si_signo, &info);

            break;

        case EXCP00_DIVZ:

#ifndef TARGET_X86_64

            if (env->eflags & VM_MASK) {

                handle_vm86_trap(env, trapnr);

            } else

#endif

            {

                /* division by zero */

                info.si_signo = SIGFPE;

                info.si_errno = 0;

                info.si_code = TARGET_FPE_INTDIV;

                info._sifields._sigfault._addr = env->eip;

                queue_signal(info.si_signo, &info);

            }

            break;

        case EXCP01_SSTP:

        case EXCP03_INT3:

#ifndef TARGET_X86_64

            if (env->eflags & VM_MASK) {

                handle_vm86_trap(env, trapnr);

            } else

#endif

            {

                info.si_signo = SIGTRAP;

                info.si_errno = 0;

                if (trapnr == EXCP01_SSTP) {

                    info.si_code = TARGET_TRAP_BRKPT;

                    info._sifields._sigfault._addr = env->eip;

                } else {

                    info.si_code = TARGET_SI_KERNEL;

                    info._sifields._sigfault._addr = 0;

                }

                queue_signal(info.si_signo, &info);

            }

            break;

        case EXCP04_INTO:

        case EXCP05_BOUND:

#ifndef TARGET_X86_64

            if (env->eflags & VM_MASK) {

                handle_vm86_trap(env, trapnr);

            } else

#endif

            {

                info.si_signo = SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SI_KERNEL;

                info._sifields._sigfault._addr = 0;

                queue_signal(info.si_signo, &info);

            }

            break;

        case EXCP06_ILLOP:

            info.si_signo = SIGILL;

            info.si_errno = 0;

            info.si_code = TARGET_ILL_ILLOPN;

            info._sifields._sigfault._addr = env->eip;

            queue_signal(info.si_signo, &info);

            break;

        case EXCP_INTERRUPT:

            /* just indicate that signals should be handled asap */

            break;

        case EXCP_DEBUG:

            {

                int sig;

                sig = gdb_handlesig (env, TARGET_SIGTRAP);

                if (sig)

                  {

                    info.si_signo = sig;

                    info.si_errno = 0;

                    info.si_code = TARGET_TRAP_BRKPT;

                    queue_signal(info.si_signo, &info);

                  }

            }

            break;

        default:

            pc = env->segs[R_CS].base + env->eip;

            fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",

                    (long)pc, trapnr);

            abort();

        }

        process_pending_signals(env);

    }

}

#endif

#ifdef TARGET_ARM

/* XXX: find a better solution */

extern void tb_invalidate_page_range(target_ulong start, target_ulong end);

static void arm_cache_flush(target_ulong start, target_ulong last)

{

    target_ulong addr, last1;

    if (last < start)

        return;

    addr = start;

    for(;;) {

        last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;

        if (last1 > last)

            last1 = last;

        tb_invalidate_page_range(addr, last1 + 1);

        if (last1 == last)

            break;

        addr = last1 + 1;

    }

}

void cpu_loop(CPUARMState *env)

{

    int trapnr;

    unsigned int n, insn;

    target_siginfo_t info;

    uint32_t addr;

    for(;;) {

        trapnr = cpu_arm_exec(env);

        switch(trapnr) {

        case EXCP_UDEF:

            {

                TaskState *ts = env->opaque;

                uint32_t opcode;

                /* we handle the FPU emulation here, as Linux */

                /* we get the opcode */

                opcode = tget32(env->regs[15]);

                if (EmulateAll(opcode, &ts->fpa, env) == 0) {

                    info.si_signo = SIGILL;

                    info.si_errno = 0;

                    info.si_code = TARGET_ILL_ILLOPN;

                    info._sifields._sigfault._addr = env->regs[15];

                    queue_signal(info.si_signo, &info);

                } else {

                    /* increment PC */

                    env->regs[15] += 4;

                }

            }

            break;

        case EXCP_SWI:

        case EXCP_BKPT:

            {

                env->eabi = 1;

                /* system call */

                if (trapnr == EXCP_BKPT) {

                    if (env->thumb) {

                        insn = tget16(env->regs[15]);

                        n = insn & 0xff;

                        env->regs[15] += 2;

                    } else {

                        insn = tget32(env->regs[15]);

                        n = (insn & 0xf) | ((insn >> 4) & 0xff0);

                        env->regs[15] += 4;

                    }

                } else {

                    if (env->thumb) {

                        insn = tget16(env->regs[15] - 2);

                        n = insn & 0xff;

                    } else {

                        insn = tget32(env->regs[15] - 4);

                        n = insn & 0xffffff;

                    }

                }

                if (n == ARM_NR_cacheflush) {

                    arm_cache_flush(env->regs[0], env->regs[1]);

                } else if (n == ARM_NR_semihosting

                           || n == ARM_NR_thumb_semihosting) {

                    env->regs[0] = do_arm_semihosting (env);

                } else if (n == 0 || n >= ARM_SYSCALL_BASE

                           || (env->thumb && n == ARM_THUMB_SYSCALL)) {

                    /* linux syscall */

                    if (env->thumb || n == 0) {

                        n = env->regs[7];

                    } else {

                        n -= ARM_SYSCALL_BASE;

                        env->eabi = 0;

                    }

                    env->regs[0] = do_syscall(env,

                                              n,

                                              env->regs[0],

                                              env->regs[1],

                                              env->regs[2],

                                              env->regs[3],

                                              env->regs[4],

                                              env->regs[5]);

                } else {

                    goto error;

                }

            }

            break;

        case EXCP_INTERRUPT:

            /* just indicate that signals should be handled asap */

            break;

        case EXCP_PREFETCH_ABORT:

            addr = env->cp15.c6_data;

            goto do_segv;

        case EXCP_DATA_ABORT:

            addr = env->cp15.c6_insn;

            goto do_segv;

        do_segv:

            {

                info.si_signo = SIGSEGV;

                info.si_errno = 0;

                /* XXX: check env->error_code */

                info.si_code = TARGET_SEGV_MAPERR;

                info._sifields._sigfault._addr = addr;

                queue_signal(info.si_signo, &info);

            }

            break;

        case EXCP_DEBUG:

            {

                int sig;

                sig = gdb_handlesig (env, TARGET_SIGTRAP);

                if (sig)

                  {

                    info.si_signo = sig;

                    info.si_errno = 0;

                    info.si_code = TARGET_TRAP_BRKPT;

                    queue_signal(info.si_signo, &info);

                  }

            }

            break;

        default:

        error:

            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",

                    trapnr);

            cpu_dump_state(env, stderr, fprintf, 0);

            abort();

        }

        process_pending_signals(env);

    }

}

#endif

#ifdef TARGET_SPARC

//#define DEBUG_WIN

/* WARNING: dealing with register windows _is_ complicated. More info

   can be found at http://www.sics.se/~psm/sparcstack.html */

static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)

{

    index = (index + cwp * 16) & (16 * NWINDOWS - 1);

    /* wrap handling : if cwp is on the last window, then we use the

       registers 'after' the end */

    if (index < 8 && env->cwp == (NWINDOWS - 1))

        index += (16 * NWINDOWS);

    return index;

}

/* save the register window 'cwp1' */

static inline void save_window_offset(CPUSPARCState *env, int cwp1)

{

    unsigned int i;

    target_ulong sp_ptr;

    sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];

#if defined(DEBUG_WIN)

    printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",

           (int)sp_ptr, cwp1);

#endif

    for(i = 0; i < 16; i++) {

        tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);

        sp_ptr += sizeof(target_ulong);

    }

}

static void save_window(CPUSPARCState *env)

{

#ifndef TARGET_SPARC64

    unsigned int new_wim;

    new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &

        ((1LL << NWINDOWS) - 1);

    save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));

    env->wim = new_wim;

#else

    save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));

    env->cansave++;

    env->canrestore--;

#endif

}

static void restore_window(CPUSPARCState *env)

{

    unsigned int new_wim, i, cwp1;

    target_ulong sp_ptr;

    new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &

        ((1LL << NWINDOWS) - 1);

    /* restore the invalid window */

    cwp1 = (env->cwp + 1) & (NWINDOWS - 1);

    sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];

#if defined(DEBUG_WIN)

    printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",

           (int)sp_ptr, cwp1);

#endif

    for(i = 0; i < 16; i++) {

        env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);

        sp_ptr += sizeof(target_ulong);

    }

    env->wim = new_wim;

#ifdef TARGET_SPARC64

    env->canrestore++;

    if (env->cleanwin < NWINDOWS - 1)

        env->cleanwin++;

    env->cansave--;

#endif

}

static void flush_windows(CPUSPARCState *env)

{

    int offset, cwp1;

    offset = 1;

    for(;;) {

        /* if restore would invoke restore_window(), then we can stop */

        cwp1 = (env->cwp + offset) & (NWINDOWS - 1);

        if (env->wim & (1 << cwp1))

            break;

        save_window_offset(env, cwp1);

        offset++;

    }

    /* set wim so that restore will reload the registers */

    cwp1 = (env->cwp + 1) & (NWINDOWS - 1);

    env->wim = 1 << cwp1;

#if defined(DEBUG_WIN)

    printf("flush_windows: nb=%d\n", offset - 1);

#endif

}

void cpu_loop (CPUSPARCState *env)

{

    int trapnr, ret;

    target_siginfo_t info;

    while (1) {

        trapnr = cpu_sparc_exec (env);

        switch (trapnr) {

#ifndef TARGET_SPARC64

        case 0x88:

        case 0x90:

#else

        case 0x16d:

#endif

            ret = do_syscall (env, env->gregs[1],

                              env->regwptr[0], env->regwptr[1],

                              env->regwptr[2], env->regwptr[3],

                              env->regwptr[4], env->regwptr[5]);

            if ((unsigned int)ret >= (unsigned int)(-515)) {

#ifdef TARGET_SPARC64

                env->xcc |= PSR_CARRY;

#else

                env->psr |= PSR_CARRY;

#endif

                ret = -ret;

            } else {

#ifdef TARGET_SPARC64

                env->xcc &= ~PSR_CARRY;

#else

                env->psr &= ~PSR_CARRY;

#endif

            }

            env->regwptr[0] = ret;

            /* next instruction */

            env->pc = env->npc;

            env->npc = env->npc + 4;

            break;

        case 0x83: /* flush windows */

            flush_windows(env);

            /* next instruction */

            env->pc = env->npc;

            env->npc = env->npc + 4;

            break;

#ifndef TARGET_SPARC64

        case TT_WIN_OVF: /* window overflow */

            save_window(env);

            break;

        case TT_WIN_UNF: /* window underflow */

            restore_window(env);

            break;

        case TT_TFAULT:

        case TT_DFAULT:

            {

                info.si_signo = SIGSEGV;

                info.si_errno = 0;

                /* XXX: check env->error_code */

                info.si_code = TARGET_SEGV_MAPERR;

                info._sifields._sigfault._addr = env->mmuregs[4];

                queue_signal(info.si_signo, &info);

            }

            break;

#else

        case TT_SPILL: /* window overflow */

            save_window(env);

            break;

        case TT_FILL: /* window underflow */

            restore_window(env);

            break;

        case TT_TFAULT:

        case TT_DFAULT:

            {

                info.si_signo = SIGSEGV;

                info.si_errno = 0;

                /* XXX: check env->error_code */

                info.si_code = TARGET_SEGV_MAPERR;

                if (trapnr == TT_DFAULT)

                    info._sifields._sigfault._addr = env->dmmuregs[4];

                else

                    info._sifields._sigfault._addr = env->tpc[env->tl];

                queue_signal(info.si_signo, &info);

            }

            break;

        case 0x16e:

            flush_windows(env);

            sparc64_get_context(env);

            break;

        case 0x16f:

            flush_windows(env);

            sparc64_set_context(env);

            break;

#endif

        case EXCP_INTERRUPT:

            /* just indicate that signals should be handled asap */

            break;

        case EXCP_DEBUG:

            {

                int sig;

                sig = gdb_handlesig (env, TARGET_SIGTRAP);

                if (sig)

                  {

                    info.si_signo = sig;

                    info.si_errno = 0;

                    info.si_code = TARGET_TRAP_BRKPT;

                    queue_signal(info.si_signo, &info);

                  }

            }

            break;

        default:

            printf ("Unhandled trap: 0x%x\n", trapnr);

            cpu_dump_state(env, stderr, fprintf, 0);

            exit (1);

        }

        process_pending_signals (env);

    }

}

#endif

#ifdef TARGET_PPC

static inline uint64_t cpu_ppc_get_tb (CPUState *env)

{

    /* TO FIX */

    return 0;

}

uint32_t cpu_ppc_load_tbl (CPUState *env)

{

    return cpu_ppc_get_tb(env) & 0xFFFFFFFF;

}

uint32_t cpu_ppc_load_tbu (CPUState *env)

{

    return cpu_ppc_get_tb(env) >> 32;

}

uint32_t cpu_ppc_load_atbl (CPUState *env)

{

    return cpu_ppc_get_tb(env) & 0xFFFFFFFF;

}

uint32_t cpu_ppc_load_atbu (CPUState *env)

{

    return cpu_ppc_get_tb(env) >> 32;

}

uint32_t cpu_ppc601_load_rtcu (CPUState *env)

__attribute__ (( alias ("cpu_ppc_load_tbu") ));

uint32_t cpu_ppc601_load_rtcl (CPUState *env)

{

    return cpu_ppc_load_tbl(env) & 0x3FFFFF80;

}

/* XXX: to be fixed */

int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)

{

    return -1;

}

int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)

{

    return -1;

}

#define EXCP_DUMP(env, fmt, args...)                                         \

do {                                                                          \

    fprintf(stderr, fmt , ##args);                                            \

    cpu_dump_state(env, stderr, fprintf, 0);                                  \

    if (loglevel != 0) {                                                      \

        fprintf(logfile, fmt , ##args);                                       \

        cpu_dump_state(env, logfile, fprintf, 0);                             \

    }                                                                         \

} while (0)

void cpu_loop(CPUPPCState *env)

{

    target_siginfo_t info;

    int trapnr;

    uint32_t ret;

    for(;;) {

        trapnr = cpu_ppc_exec(env);

        switch(trapnr) {

        case POWERPC_EXCP_NONE:

            /* Just go on */

            break;

        case POWERPC_EXCP_CRITICAL: /* Critical input                        */

            cpu_abort(env, "Critical interrupt while in user mode. "

                      "Aborting\n");

            break;

        case POWERPC_EXCP_MCHECK:   /* Machine check exception               */

            cpu_abort(env, "Machine check exception while in user mode. "

                      "Aborting\n");

            break;

        case POWERPC_EXCP_DSI:      /* Data storage exception                */

            EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",

                      env->spr[SPR_DAR]);

            /* XXX: check this. Seems bugged */

            switch (env->error_code & 0xFF000000) {

            case 0x40000000:

                info.si_signo = TARGET_SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SEGV_MAPERR;

                break;

            case 0x04000000:

                info.si_signo = TARGET_SIGILL;

                info.si_errno = 0;

                info.si_code = TARGET_ILL_ILLADR;

                break;

            case 0x08000000:

                info.si_signo = TARGET_SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SEGV_ACCERR;

                break;

            default:

                /* Let's send a regular segfault... */

                EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",

                          env->error_code);

                info.si_signo = TARGET_SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SEGV_MAPERR;

                break;

            }

            info._sifields._sigfault._addr = env->nip;

            queue_signal(info.si_signo, &info);

            break;

        case POWERPC_EXCP_ISI:      /* Instruction storage exception         */

            EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",

                      env->spr[SPR_DAR]);

            /* XXX: check this */

            switch (env->error_code & 0xFF000000) {

            case 0x40000000:

                info.si_signo = TARGET_SIGSEGV;

            info.si_errno = 0;

                info.si_code = TARGET_SEGV_MAPERR;

                break;

            case 0x10000000:

            case 0x08000000:

                info.si_signo = TARGET_SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SEGV_ACCERR;

                break;

            default:

                /* Let's send a regular segfault... */

                EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",

                          env->error_code);

                info.si_signo = TARGET_SIGSEGV;

                info.si_errno = 0;

                info.si_code = TARGET_SEGV_MAPERR;

                break;

            }

            info._sifields._sigfault._addr = env->nip - 4;

            queue_signal(info.si_signo, &info);

            break;

        case POWERPC_EXCP_EXTERNAL: /* External input                        */

            cpu_abort(env, "External interrupt while in user mode. "

                      "Aborting\n");

            break;

        case POWERPC_EXCP_ALIGN:    /* Alignment exception                   */

            EXCP_DUMP(env, "Unaligned memory access\n");

            /* XXX: check this */

            info.si_signo = TARGET_SIGBUS;

            info.si_errno = 0;

            info.si_code = TARGET_BUS_ADRALN;

            info._sifields._sigfault._addr = env->nip - 4;

            queue_signal(info.si_signo, &info);

            break;

        case POWERPC_EXCP_PROGRAM:  /* Program exception                     */

            /* XXX: check this */

            switch (env->error_code & ~0xF) {

            case POWERPC_EXCP_FP:

                EXCP_DUMP(env, "Floating point program exception\n");

                /* Set FX */

                env->fpscr[7] |= 0x8;

                /* Finally, update FEX */

                if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) &

                    ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3)))

                    env->fpscr[7] |= 0x4;

                info.si_signo = TARGET_SIGFPE;

                info.si_errno = 0;

                switch (env->error_code & 0xF) {

                case POWERPC_EXCP_FP_OX:

                    info.si_code = TARGET_FPE_FLTOVF;

                    break;

                case POWERPC_EXCP_FP_UX:

                    info.si_code = TARGET_FPE_FLTUND;

                    break;

                case POWERPC_EXCP_FP_ZX:

                case POWERPC_EXCP_FP_VXZDZ:

                    info.si_code = TARGET_FPE_FLTDIV;

                    break;

                case POWERPC_EXCP_FP_XX:

                    info.si_code = TARGET_FPE_FLTRES;

                    break;

                case POWERPC_EXCP_FP_VXSOFT:

                    info.si_code = TARGET_FPE_FLTINV;

                    break;

                case POWERPC_EXCP_FP_VXNAN:

                case POWERPC_EXCP_FP_VXISI:

                case POWERPC_EXCP_FP_VXIDI:

                case POWERPC_EXCP_FP_VXIMZ:

                case POWERPC_EXCP_FP_VXVC:

                case POWERPC_EXCP_FP_VXSQRT:

                case POWERPC_EXCP_FP_VXCVI:

                    info.si_code = TARGET_FPE_FLTSUB;

                    break;

                default:

                    EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",

                              env->error_code);

                    break;

                }

                break;

            case POWERPC_EXCP_INVAL:

                EXCP_DUMP(env, "Invalid instruction\n");

                info.si_signo = TARGET_SIGILL;

                info.si_errno = 0;

                switch (env->error_code & 0xF) {

                case POWERPC_EXCP_INVAL_INVAL:

                    info.si_code = TARGET_ILL_ILLOPC;

                    break;

                case POWERPC_EXCP_INVAL_LSWX:

                    info.si_code = TARGET_ILL_ILLOPN;

                    break;

                case POWERPC_EXCP_INVAL_SPR:

                    info.si_code = TARGET_ILL_PRVREG;

                    break;

                case POWERPC_EXCP_INVAL_FP:

                    info.si_code = TARGET_ILL_COPROC;

                    break;

                default:

                    EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",