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/*
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* qemu user main
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <errno.h> |
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#include <unistd.h> |
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#include "qemu.h" |
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|
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#define DEBUG_LOGFILE "/tmp/qemu.log" |
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#ifdef __APPLE__
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#include <crt_externs.h> |
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# define environ (*_NSGetEnviron())
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#endif
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|
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static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
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const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
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|
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#if defined(__i386__) && !defined(CONFIG_STATIC)
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/* Force usage of an ELF interpreter even if it is an ELF shared
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object ! */
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const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; |
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#endif
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|
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/* for recent libc, we add these dummy symbols which are not declared
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when generating a linked object (bug in ld ?) */
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#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) |
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long __preinit_array_start[0]; |
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long __preinit_array_end[0]; |
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long __init_array_start[0]; |
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long __init_array_end[0]; |
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long __fini_array_start[0]; |
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long __fini_array_end[0]; |
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#endif
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|
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/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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we allocate a bigger stack. Need a better solution, for example
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by remapping the process stack directly at the right place */
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unsigned long x86_stack_size = 512 * 1024; |
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|
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void gemu_log(const char *fmt, ...) |
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{
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va_list ap; |
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va_start(ap, fmt); |
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vfprintf(stderr, fmt, ap); |
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va_end(ap); |
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} |
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|
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void cpu_outb(CPUState *env, int addr, int val) |
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{
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fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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} |
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|
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void cpu_outw(CPUState *env, int addr, int val) |
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{
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fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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} |
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void cpu_outl(CPUState *env, int addr, int val) |
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{
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fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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} |
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|
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int cpu_inb(CPUState *env, int addr) |
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{
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fprintf(stderr, "inb: port=0x%04x\n", addr);
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return 0; |
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} |
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int cpu_inw(CPUState *env, int addr) |
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{
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fprintf(stderr, "inw: port=0x%04x\n", addr);
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return 0; |
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} |
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|
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int cpu_inl(CPUState *env, int addr) |
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{
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fprintf(stderr, "inl: port=0x%04x\n", addr);
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return 0; |
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} |
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|
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int cpu_get_pic_interrupt(CPUState *env)
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{
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return -1; |
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} |
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/* timers for rdtsc */
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|
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#if 0
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static uint64_t emu_time;
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int64_t cpu_get_real_ticks(void)
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{
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return emu_time++;
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}
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#endif
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#ifdef TARGET_I386
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/***********************************************************/
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/* CPUX86 core interface */
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|
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void cpu_smm_update(CPUState *env)
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{
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} |
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uint64_t cpu_get_tsc(CPUX86State *env) |
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{
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return cpu_get_real_ticks();
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} |
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static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
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int flags)
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{
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unsigned int e1, e2; |
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uint32_t *p; |
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e1 = (addr << 16) | (limit & 0xffff); |
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e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
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e2 |= flags; |
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p = ptr; |
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p[0] = tswapl(e1);
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p[1] = tswapl(e2);
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} |
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|
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static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
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unsigned long addr, unsigned int sel) |
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{
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unsigned int e1, e2; |
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uint32_t *p; |
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e1 = (addr & 0xffff) | (sel << 16); |
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e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
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p = ptr; |
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p[0] = tswapl(e1);
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p[1] = tswapl(e2);
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} |
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|
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uint64_t gdt_table[6];
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uint64_t idt_table[256];
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/* only dpl matters as we do only user space emulation */
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static void set_idt(int n, unsigned int dpl) |
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{
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set_gate(idt_table + n, 0, dpl, 0, 0); |
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} |
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void cpu_loop(CPUX86State *env)
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{
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int trapnr;
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target_ulong pc; |
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target_siginfo_t info; |
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|
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for(;;) {
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trapnr = cpu_x86_exec(env); |
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switch(trapnr) {
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case 0x80: |
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/* linux syscall */
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env->regs[R_EAX] = do_syscall(env, |
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env->regs[R_EAX], |
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env->regs[R_EBX], |
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env->regs[R_ECX], |
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env->regs[R_EDX], |
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env->regs[R_ESI], |
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env->regs[R_EDI], |
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env->regs[R_EBP]); |
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break;
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case EXCP0B_NOSEG:
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case EXCP0C_STACK:
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info.si_signo = SIGBUS; |
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info.si_errno = 0;
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info.si_code = TARGET_SI_KERNEL; |
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info._sifields._sigfault._addr = 0;
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queue_signal(info.si_signo, &info); |
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break;
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case EXCP0D_GPF:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_fault(env); |
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} else
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#endif
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{
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info.si_signo = SIGSEGV; |
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info.si_errno = 0;
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info.si_code = TARGET_SI_KERNEL; |
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info._sifields._sigfault._addr = 0;
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queue_signal(info.si_signo, &info); |
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} |
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break;
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case EXCP0E_PAGE:
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info.si_signo = SIGSEGV; |
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info.si_errno = 0;
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if (!(env->error_code & 1)) |
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info.si_code = TARGET_SEGV_MAPERR; |
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else
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info.si_code = TARGET_SEGV_ACCERR; |
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info._sifields._sigfault._addr = env->cr[2];
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queue_signal(info.si_signo, &info); |
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break;
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case EXCP00_DIVZ:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_trap(env, trapnr); |
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} else
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#endif
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{
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/* division by zero */
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info.si_signo = SIGFPE; |
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info.si_errno = 0;
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info.si_code = TARGET_FPE_INTDIV; |
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info._sifields._sigfault._addr = env->eip; |
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queue_signal(info.si_signo, &info); |
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} |
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break;
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case EXCP01_SSTP:
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case EXCP03_INT3:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_trap(env, trapnr); |
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} else
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#endif
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{
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info.si_signo = SIGTRAP; |
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info.si_errno = 0;
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if (trapnr == EXCP01_SSTP) {
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info.si_code = TARGET_TRAP_BRKPT; |
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info._sifields._sigfault._addr = env->eip; |
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} else {
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info.si_code = TARGET_SI_KERNEL; |
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info._sifields._sigfault._addr = 0;
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} |
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queue_signal(info.si_signo, &info); |
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} |
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break;
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case EXCP04_INTO:
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case EXCP05_BOUND:
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#ifndef TARGET_X86_64
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if (env->eflags & VM_MASK) {
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handle_vm86_trap(env, trapnr); |
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} else
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#endif
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{
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info.si_signo = SIGSEGV; |
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info.si_errno = 0;
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info.si_code = TARGET_SI_KERNEL; |
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info._sifields._sigfault._addr = 0;
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queue_signal(info.si_signo, &info); |
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} |
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break;
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case EXCP06_ILLOP:
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info.si_signo = SIGILL; |
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info.si_errno = 0;
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info.si_code = TARGET_ILL_ILLOPN; |
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info._sifields._sigfault._addr = env->eip; |
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queue_signal(info.si_signo, &info); |
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break;
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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case EXCP_DEBUG:
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{
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int sig;
|
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|
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sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 285 |
if (sig)
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{
|
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info.si_signo = sig; |
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info.si_errno = 0;
|
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info.si_code = TARGET_TRAP_BRKPT; |
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queue_signal(info.si_signo, &info); |
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} |
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} |
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break;
|
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default:
|
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pc = env->segs[R_CS].base + env->eip; |
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fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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(long)pc, trapnr);
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abort(); |
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} |
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process_pending_signals(env); |
| 301 |
} |
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} |
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#endif
|
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|
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#ifdef TARGET_ARM
|
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|
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/* XXX: find a better solution */
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extern void tb_invalidate_page_range(target_ulong start, target_ulong end); |
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|
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static void arm_cache_flush(target_ulong start, target_ulong last) |
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{
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target_ulong addr, last1; |
| 313 |
|
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if (last < start)
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return;
|
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addr = start; |
| 317 |
for(;;) {
|
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last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
|
| 319 |
if (last1 > last)
|
| 320 |
last1 = last; |
| 321 |
tb_invalidate_page_range(addr, last1 + 1);
|
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if (last1 == last)
|
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break;
|
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addr = last1 + 1;
|
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} |
| 326 |
} |
| 327 |
|
| 328 |
void cpu_loop(CPUARMState *env)
|
| 329 |
{
|
| 330 |
int trapnr;
|
| 331 |
unsigned int n, insn; |
| 332 |
target_siginfo_t info; |
| 333 |
uint32_t addr; |
| 334 |
|
| 335 |
for(;;) {
|
| 336 |
trapnr = cpu_arm_exec(env); |
| 337 |
switch(trapnr) {
|
| 338 |
case EXCP_UDEF:
|
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{
|
| 340 |
TaskState *ts = env->opaque; |
| 341 |
uint32_t opcode; |
| 342 |
|
| 343 |
/* we handle the FPU emulation here, as Linux */
|
| 344 |
/* we get the opcode */
|
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opcode = tget32(env->regs[15]);
|
| 346 |
|
| 347 |
if (EmulateAll(opcode, &ts->fpa, env) == 0) { |
| 348 |
info.si_signo = SIGILL; |
| 349 |
info.si_errno = 0;
|
| 350 |
info.si_code = TARGET_ILL_ILLOPN; |
| 351 |
info._sifields._sigfault._addr = env->regs[15];
|
| 352 |
queue_signal(info.si_signo, &info); |
| 353 |
} else {
|
| 354 |
/* increment PC */
|
| 355 |
env->regs[15] += 4; |
| 356 |
} |
| 357 |
} |
| 358 |
break;
|
| 359 |
case EXCP_SWI:
|
| 360 |
case EXCP_BKPT:
|
| 361 |
{
|
| 362 |
env->eabi = 1;
|
| 363 |
/* system call */
|
| 364 |
if (trapnr == EXCP_BKPT) {
|
| 365 |
if (env->thumb) {
|
| 366 |
insn = tget16(env->regs[15]);
|
| 367 |
n = insn & 0xff;
|
| 368 |
env->regs[15] += 2; |
| 369 |
} else {
|
| 370 |
insn = tget32(env->regs[15]);
|
| 371 |
n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
| 372 |
env->regs[15] += 4; |
| 373 |
} |
| 374 |
} else {
|
| 375 |
if (env->thumb) {
|
| 376 |
insn = tget16(env->regs[15] - 2); |
| 377 |
n = insn & 0xff;
|
| 378 |
} else {
|
| 379 |
insn = tget32(env->regs[15] - 4); |
| 380 |
n = insn & 0xffffff;
|
| 381 |
} |
| 382 |
} |
| 383 |
|
| 384 |
if (n == ARM_NR_cacheflush) {
|
| 385 |
arm_cache_flush(env->regs[0], env->regs[1]); |
| 386 |
} else if (n == ARM_NR_semihosting |
| 387 |
|| n == ARM_NR_thumb_semihosting) {
|
| 388 |
env->regs[0] = do_arm_semihosting (env);
|
| 389 |
} else if (n == 0 || n >= ARM_SYSCALL_BASE |
| 390 |
|| (env->thumb && n == ARM_THUMB_SYSCALL)) {
|
| 391 |
/* linux syscall */
|
| 392 |
if (env->thumb || n == 0) { |
| 393 |
n = env->regs[7];
|
| 394 |
} else {
|
| 395 |
n -= ARM_SYSCALL_BASE; |
| 396 |
env->eabi = 0;
|
| 397 |
} |
| 398 |
env->regs[0] = do_syscall(env,
|
| 399 |
n, |
| 400 |
env->regs[0],
|
| 401 |
env->regs[1],
|
| 402 |
env->regs[2],
|
| 403 |
env->regs[3],
|
| 404 |
env->regs[4],
|
| 405 |
env->regs[5]);
|
| 406 |
} else {
|
| 407 |
goto error;
|
| 408 |
} |
| 409 |
} |
| 410 |
break;
|
| 411 |
case EXCP_INTERRUPT:
|
| 412 |
/* just indicate that signals should be handled asap */
|
| 413 |
break;
|
| 414 |
case EXCP_PREFETCH_ABORT:
|
| 415 |
addr = env->cp15.c6_data; |
| 416 |
goto do_segv;
|
| 417 |
case EXCP_DATA_ABORT:
|
| 418 |
addr = env->cp15.c6_insn; |
| 419 |
goto do_segv;
|
| 420 |
do_segv:
|
| 421 |
{
|
| 422 |
info.si_signo = SIGSEGV; |
| 423 |
info.si_errno = 0;
|
| 424 |
/* XXX: check env->error_code */
|
| 425 |
info.si_code = TARGET_SEGV_MAPERR; |
| 426 |
info._sifields._sigfault._addr = addr; |
| 427 |
queue_signal(info.si_signo, &info); |
| 428 |
} |
| 429 |
break;
|
| 430 |
case EXCP_DEBUG:
|
| 431 |
{
|
| 432 |
int sig;
|
| 433 |
|
| 434 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 435 |
if (sig)
|
| 436 |
{
|
| 437 |
info.si_signo = sig; |
| 438 |
info.si_errno = 0;
|
| 439 |
info.si_code = TARGET_TRAP_BRKPT; |
| 440 |
queue_signal(info.si_signo, &info); |
| 441 |
} |
| 442 |
} |
| 443 |
break;
|
| 444 |
default:
|
| 445 |
error:
|
| 446 |
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
| 447 |
trapnr); |
| 448 |
cpu_dump_state(env, stderr, fprintf, 0);
|
| 449 |
abort(); |
| 450 |
} |
| 451 |
process_pending_signals(env); |
| 452 |
} |
| 453 |
} |
| 454 |
|
| 455 |
#endif
|
| 456 |
|
| 457 |
#ifdef TARGET_SPARC
|
| 458 |
|
| 459 |
//#define DEBUG_WIN
|
| 460 |
|
| 461 |
/* WARNING: dealing with register windows _is_ complicated. More info
|
| 462 |
can be found at http://www.sics.se/~psm/sparcstack.html */
|
| 463 |
static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
| 464 |
{
|
| 465 |
index = (index + cwp * 16) & (16 * NWINDOWS - 1); |
| 466 |
/* wrap handling : if cwp is on the last window, then we use the
|
| 467 |
registers 'after' the end */
|
| 468 |
if (index < 8 && env->cwp == (NWINDOWS - 1)) |
| 469 |
index += (16 * NWINDOWS);
|
| 470 |
return index;
|
| 471 |
} |
| 472 |
|
| 473 |
/* save the register window 'cwp1' */
|
| 474 |
static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
| 475 |
{
|
| 476 |
unsigned int i; |
| 477 |
target_ulong sp_ptr; |
| 478 |
|
| 479 |
sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
| 480 |
#if defined(DEBUG_WIN)
|
| 481 |
printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
|
| 482 |
(int)sp_ptr, cwp1);
|
| 483 |
#endif
|
| 484 |
for(i = 0; i < 16; i++) { |
| 485 |
tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
|
| 486 |
sp_ptr += sizeof(target_ulong);
|
| 487 |
} |
| 488 |
} |
| 489 |
|
| 490 |
static void save_window(CPUSPARCState *env) |
| 491 |
{
|
| 492 |
#ifndef TARGET_SPARC64
|
| 493 |
unsigned int new_wim; |
| 494 |
new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & |
| 495 |
((1LL << NWINDOWS) - 1); |
| 496 |
save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
| 497 |
env->wim = new_wim; |
| 498 |
#else
|
| 499 |
save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
| 500 |
env->cansave++; |
| 501 |
env->canrestore--; |
| 502 |
#endif
|
| 503 |
} |
| 504 |
|
| 505 |
static void restore_window(CPUSPARCState *env) |
| 506 |
{
|
| 507 |
unsigned int new_wim, i, cwp1; |
| 508 |
target_ulong sp_ptr; |
| 509 |
|
| 510 |
new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & |
| 511 |
((1LL << NWINDOWS) - 1); |
| 512 |
|
| 513 |
/* restore the invalid window */
|
| 514 |
cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
| 515 |
sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
| 516 |
#if defined(DEBUG_WIN)
|
| 517 |
printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
|
| 518 |
(int)sp_ptr, cwp1);
|
| 519 |
#endif
|
| 520 |
for(i = 0; i < 16; i++) { |
| 521 |
env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
|
| 522 |
sp_ptr += sizeof(target_ulong);
|
| 523 |
} |
| 524 |
env->wim = new_wim; |
| 525 |
#ifdef TARGET_SPARC64
|
| 526 |
env->canrestore++; |
| 527 |
if (env->cleanwin < NWINDOWS - 1) |
| 528 |
env->cleanwin++; |
| 529 |
env->cansave--; |
| 530 |
#endif
|
| 531 |
} |
| 532 |
|
| 533 |
static void flush_windows(CPUSPARCState *env) |
| 534 |
{
|
| 535 |
int offset, cwp1;
|
| 536 |
|
| 537 |
offset = 1;
|
| 538 |
for(;;) {
|
| 539 |
/* if restore would invoke restore_window(), then we can stop */
|
| 540 |
cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
|
| 541 |
if (env->wim & (1 << cwp1)) |
| 542 |
break;
|
| 543 |
save_window_offset(env, cwp1); |
| 544 |
offset++; |
| 545 |
} |
| 546 |
/* set wim so that restore will reload the registers */
|
| 547 |
cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
| 548 |
env->wim = 1 << cwp1;
|
| 549 |
#if defined(DEBUG_WIN)
|
| 550 |
printf("flush_windows: nb=%d\n", offset - 1); |
| 551 |
#endif
|
| 552 |
} |
| 553 |
|
| 554 |
void cpu_loop (CPUSPARCState *env)
|
| 555 |
{
|
| 556 |
int trapnr, ret;
|
| 557 |
target_siginfo_t info; |
| 558 |
|
| 559 |
while (1) { |
| 560 |
trapnr = cpu_sparc_exec (env); |
| 561 |
|
| 562 |
switch (trapnr) {
|
| 563 |
#ifndef TARGET_SPARC64
|
| 564 |
case 0x88: |
| 565 |
case 0x90: |
| 566 |
#else
|
| 567 |
case 0x16d: |
| 568 |
#endif
|
| 569 |
ret = do_syscall (env, env->gregs[1],
|
| 570 |
env->regwptr[0], env->regwptr[1], |
| 571 |
env->regwptr[2], env->regwptr[3], |
| 572 |
env->regwptr[4], env->regwptr[5]); |
| 573 |
if ((unsigned int)ret >= (unsigned int)(-515)) { |
| 574 |
#ifdef TARGET_SPARC64
|
| 575 |
env->xcc |= PSR_CARRY; |
| 576 |
#else
|
| 577 |
env->psr |= PSR_CARRY; |
| 578 |
#endif
|
| 579 |
ret = -ret; |
| 580 |
} else {
|
| 581 |
#ifdef TARGET_SPARC64
|
| 582 |
env->xcc &= ~PSR_CARRY; |
| 583 |
#else
|
| 584 |
env->psr &= ~PSR_CARRY; |
| 585 |
#endif
|
| 586 |
} |
| 587 |
env->regwptr[0] = ret;
|
| 588 |
/* next instruction */
|
| 589 |
env->pc = env->npc; |
| 590 |
env->npc = env->npc + 4;
|
| 591 |
break;
|
| 592 |
case 0x83: /* flush windows */ |
| 593 |
flush_windows(env); |
| 594 |
/* next instruction */
|
| 595 |
env->pc = env->npc; |
| 596 |
env->npc = env->npc + 4;
|
| 597 |
break;
|
| 598 |
#ifndef TARGET_SPARC64
|
| 599 |
case TT_WIN_OVF: /* window overflow */ |
| 600 |
save_window(env); |
| 601 |
break;
|
| 602 |
case TT_WIN_UNF: /* window underflow */ |
| 603 |
restore_window(env); |
| 604 |
break;
|
| 605 |
case TT_TFAULT:
|
| 606 |
case TT_DFAULT:
|
| 607 |
{
|
| 608 |
info.si_signo = SIGSEGV; |
| 609 |
info.si_errno = 0;
|
| 610 |
/* XXX: check env->error_code */
|
| 611 |
info.si_code = TARGET_SEGV_MAPERR; |
| 612 |
info._sifields._sigfault._addr = env->mmuregs[4];
|
| 613 |
queue_signal(info.si_signo, &info); |
| 614 |
} |
| 615 |
break;
|
| 616 |
#else
|
| 617 |
case TT_SPILL: /* window overflow */ |
| 618 |
save_window(env); |
| 619 |
break;
|
| 620 |
case TT_FILL: /* window underflow */ |
| 621 |
restore_window(env); |
| 622 |
break;
|
| 623 |
case TT_TFAULT:
|
| 624 |
case TT_DFAULT:
|
| 625 |
{
|
| 626 |
info.si_signo = SIGSEGV; |
| 627 |
info.si_errno = 0;
|
| 628 |
/* XXX: check env->error_code */
|
| 629 |
info.si_code = TARGET_SEGV_MAPERR; |
| 630 |
if (trapnr == TT_DFAULT)
|
| 631 |
info._sifields._sigfault._addr = env->dmmuregs[4];
|
| 632 |
else
|
| 633 |
info._sifields._sigfault._addr = env->tpc[env->tl]; |
| 634 |
queue_signal(info.si_signo, &info); |
| 635 |
} |
| 636 |
break;
|
| 637 |
case 0x16e: |
| 638 |
flush_windows(env); |
| 639 |
sparc64_get_context(env); |
| 640 |
break;
|
| 641 |
case 0x16f: |
| 642 |
flush_windows(env); |
| 643 |
sparc64_set_context(env); |
| 644 |
break;
|
| 645 |
#endif
|
| 646 |
case EXCP_INTERRUPT:
|
| 647 |
/* just indicate that signals should be handled asap */
|
| 648 |
break;
|
| 649 |
case EXCP_DEBUG:
|
| 650 |
{
|
| 651 |
int sig;
|
| 652 |
|
| 653 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 654 |
if (sig)
|
| 655 |
{
|
| 656 |
info.si_signo = sig; |
| 657 |
info.si_errno = 0;
|
| 658 |
info.si_code = TARGET_TRAP_BRKPT; |
| 659 |
queue_signal(info.si_signo, &info); |
| 660 |
} |
| 661 |
} |
| 662 |
break;
|
| 663 |
default:
|
| 664 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
| 665 |
cpu_dump_state(env, stderr, fprintf, 0);
|
| 666 |
exit (1);
|
| 667 |
} |
| 668 |
process_pending_signals (env); |
| 669 |
} |
| 670 |
} |
| 671 |
|
| 672 |
#endif
|
| 673 |
|
| 674 |
#ifdef TARGET_PPC
|
| 675 |
static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
| 676 |
{
|
| 677 |
/* TO FIX */
|
| 678 |
return 0; |
| 679 |
} |
| 680 |
|
| 681 |
uint32_t cpu_ppc_load_tbl (CPUState *env) |
| 682 |
{
|
| 683 |
return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
| 684 |
} |
| 685 |
|
| 686 |
uint32_t cpu_ppc_load_tbu (CPUState *env) |
| 687 |
{
|
| 688 |
return cpu_ppc_get_tb(env) >> 32; |
| 689 |
} |
| 690 |
|
| 691 |
uint32_t cpu_ppc_load_atbl (CPUState *env) |
| 692 |
{
|
| 693 |
return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
| 694 |
} |
| 695 |
|
| 696 |
uint32_t cpu_ppc_load_atbu (CPUState *env) |
| 697 |
{
|
| 698 |
return cpu_ppc_get_tb(env) >> 32; |
| 699 |
} |
| 700 |
|
| 701 |
uint32_t cpu_ppc601_load_rtcu (CPUState *env) |
| 702 |
__attribute__ (( alias ("cpu_ppc_load_tbu") ));
|
| 703 |
|
| 704 |
uint32_t cpu_ppc601_load_rtcl (CPUState *env) |
| 705 |
{
|
| 706 |
return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
| 707 |
} |
| 708 |
|
| 709 |
/* XXX: to be fixed */
|
| 710 |
int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp) |
| 711 |
{
|
| 712 |
return -1; |
| 713 |
} |
| 714 |
|
| 715 |
int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) |
| 716 |
{
|
| 717 |
return -1; |
| 718 |
} |
| 719 |
|
| 720 |
#define EXCP_DUMP(env, fmt, args...) \
|
| 721 |
do { \
|
| 722 |
fprintf(stderr, fmt , ##args); \ |
| 723 |
cpu_dump_state(env, stderr, fprintf, 0); \
|
| 724 |
if (loglevel != 0) { \ |
| 725 |
fprintf(logfile, fmt , ##args); \ |
| 726 |
cpu_dump_state(env, logfile, fprintf, 0); \
|
| 727 |
} \ |
| 728 |
} while (0) |
| 729 |
|
| 730 |
void cpu_loop(CPUPPCState *env)
|
| 731 |
{
|
| 732 |
target_siginfo_t info; |
| 733 |
int trapnr;
|
| 734 |
uint32_t ret; |
| 735 |
|
| 736 |
for(;;) {
|
| 737 |
trapnr = cpu_ppc_exec(env); |
| 738 |
switch(trapnr) {
|
| 739 |
case POWERPC_EXCP_NONE:
|
| 740 |
/* Just go on */
|
| 741 |
break;
|
| 742 |
case POWERPC_EXCP_CRITICAL: /* Critical input */ |
| 743 |
cpu_abort(env, "Critical interrupt while in user mode. "
|
| 744 |
"Aborting\n");
|
| 745 |
break;
|
| 746 |
case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
| 747 |
cpu_abort(env, "Machine check exception while in user mode. "
|
| 748 |
"Aborting\n");
|
| 749 |
break;
|
| 750 |
case POWERPC_EXCP_DSI: /* Data storage exception */ |
| 751 |
EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n", |
| 752 |
env->spr[SPR_DAR]); |
| 753 |
/* XXX: check this. Seems bugged */
|
| 754 |
switch (env->error_code & 0xFF000000) { |
| 755 |
case 0x40000000: |
| 756 |
info.si_signo = TARGET_SIGSEGV; |
| 757 |
info.si_errno = 0;
|
| 758 |
info.si_code = TARGET_SEGV_MAPERR; |
| 759 |
break;
|
| 760 |
case 0x04000000: |
| 761 |
info.si_signo = TARGET_SIGILL; |
| 762 |
info.si_errno = 0;
|
| 763 |
info.si_code = TARGET_ILL_ILLADR; |
| 764 |
break;
|
| 765 |
case 0x08000000: |
| 766 |
info.si_signo = TARGET_SIGSEGV; |
| 767 |
info.si_errno = 0;
|
| 768 |
info.si_code = TARGET_SEGV_ACCERR; |
| 769 |
break;
|
| 770 |
default:
|
| 771 |
/* Let's send a regular segfault... */
|
| 772 |
EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
| 773 |
env->error_code); |
| 774 |
info.si_signo = TARGET_SIGSEGV; |
| 775 |
info.si_errno = 0;
|
| 776 |
info.si_code = TARGET_SEGV_MAPERR; |
| 777 |
break;
|
| 778 |
} |
| 779 |
info._sifields._sigfault._addr = env->nip; |
| 780 |
queue_signal(info.si_signo, &info); |
| 781 |
break;
|
| 782 |
case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
| 783 |
EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n", |
| 784 |
env->spr[SPR_DAR]); |
| 785 |
/* XXX: check this */
|
| 786 |
switch (env->error_code & 0xFF000000) { |
| 787 |
case 0x40000000: |
| 788 |
info.si_signo = TARGET_SIGSEGV; |
| 789 |
info.si_errno = 0;
|
| 790 |
info.si_code = TARGET_SEGV_MAPERR; |
| 791 |
break;
|
| 792 |
case 0x10000000: |
| 793 |
case 0x08000000: |
| 794 |
info.si_signo = TARGET_SIGSEGV; |
| 795 |
info.si_errno = 0;
|
| 796 |
info.si_code = TARGET_SEGV_ACCERR; |
| 797 |
break;
|
| 798 |
default:
|
| 799 |
/* Let's send a regular segfault... */
|
| 800 |
EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
| 801 |
env->error_code); |
| 802 |
info.si_signo = TARGET_SIGSEGV; |
| 803 |
info.si_errno = 0;
|
| 804 |
info.si_code = TARGET_SEGV_MAPERR; |
| 805 |
break;
|
| 806 |
} |
| 807 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 808 |
queue_signal(info.si_signo, &info); |
| 809 |
break;
|
| 810 |
case POWERPC_EXCP_EXTERNAL: /* External input */ |
| 811 |
cpu_abort(env, "External interrupt while in user mode. "
|
| 812 |
"Aborting\n");
|
| 813 |
break;
|
| 814 |
case POWERPC_EXCP_ALIGN: /* Alignment exception */ |
| 815 |
EXCP_DUMP(env, "Unaligned memory access\n");
|
| 816 |
/* XXX: check this */
|
| 817 |
info.si_signo = TARGET_SIGBUS; |
| 818 |
info.si_errno = 0;
|
| 819 |
info.si_code = TARGET_BUS_ADRALN; |
| 820 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 821 |
queue_signal(info.si_signo, &info); |
| 822 |
break;
|
| 823 |
case POWERPC_EXCP_PROGRAM: /* Program exception */ |
| 824 |
/* XXX: check this */
|
| 825 |
switch (env->error_code & ~0xF) { |
| 826 |
case POWERPC_EXCP_FP:
|
| 827 |
EXCP_DUMP(env, "Floating point program exception\n");
|
| 828 |
/* Set FX */
|
| 829 |
env->fpscr[7] |= 0x8; |
| 830 |
/* Finally, update FEX */
|
| 831 |
if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) & |
| 832 |
((env->fpscr[1] << 1) | (env->fpscr[0] >> 3))) |
| 833 |
env->fpscr[7] |= 0x4; |
| 834 |
info.si_signo = TARGET_SIGFPE; |
| 835 |
info.si_errno = 0;
|
| 836 |
switch (env->error_code & 0xF) { |
| 837 |
case POWERPC_EXCP_FP_OX:
|
| 838 |
info.si_code = TARGET_FPE_FLTOVF; |
| 839 |
break;
|
| 840 |
case POWERPC_EXCP_FP_UX:
|
| 841 |
info.si_code = TARGET_FPE_FLTUND; |
| 842 |
break;
|
| 843 |
case POWERPC_EXCP_FP_ZX:
|
| 844 |
case POWERPC_EXCP_FP_VXZDZ:
|
| 845 |
info.si_code = TARGET_FPE_FLTDIV; |
| 846 |
break;
|
| 847 |
case POWERPC_EXCP_FP_XX:
|
| 848 |
info.si_code = TARGET_FPE_FLTRES; |
| 849 |
break;
|
| 850 |
case POWERPC_EXCP_FP_VXSOFT:
|
| 851 |
info.si_code = TARGET_FPE_FLTINV; |
| 852 |
break;
|
| 853 |
case POWERPC_EXCP_FP_VXNAN:
|
| 854 |
case POWERPC_EXCP_FP_VXISI:
|
| 855 |
case POWERPC_EXCP_FP_VXIDI:
|
| 856 |
case POWERPC_EXCP_FP_VXIMZ:
|
| 857 |
case POWERPC_EXCP_FP_VXVC:
|
| 858 |
case POWERPC_EXCP_FP_VXSQRT:
|
| 859 |
case POWERPC_EXCP_FP_VXCVI:
|
| 860 |
info.si_code = TARGET_FPE_FLTSUB; |
| 861 |
break;
|
| 862 |
default:
|
| 863 |
EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
|
| 864 |
env->error_code); |
| 865 |
break;
|
| 866 |
} |
| 867 |
break;
|
| 868 |
case POWERPC_EXCP_INVAL:
|
| 869 |
EXCP_DUMP(env, "Invalid instruction\n");
|
| 870 |
info.si_signo = TARGET_SIGILL; |
| 871 |
info.si_errno = 0;
|
| 872 |
switch (env->error_code & 0xF) { |
| 873 |
case POWERPC_EXCP_INVAL_INVAL:
|
| 874 |
info.si_code = TARGET_ILL_ILLOPC; |
| 875 |
break;
|
| 876 |
case POWERPC_EXCP_INVAL_LSWX:
|
| 877 |
info.si_code = TARGET_ILL_ILLOPN; |
| 878 |
break;
|
| 879 |
case POWERPC_EXCP_INVAL_SPR:
|
| 880 |
info.si_code = TARGET_ILL_PRVREG; |
| 881 |
break;
|
| 882 |
case POWERPC_EXCP_INVAL_FP:
|
| 883 |
info.si_code = TARGET_ILL_COPROC; |
| 884 |
break;
|
| 885 |
default:
|
| 886 |
EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
|
| 887 |
env->error_code & 0xF);
|
| 888 |
info.si_code = TARGET_ILL_ILLADR; |
| 889 |
break;
|
| 890 |
} |
| 891 |
break;
|
| 892 |
case POWERPC_EXCP_PRIV:
|
| 893 |
EXCP_DUMP(env, "Privilege violation\n");
|
| 894 |
info.si_signo = TARGET_SIGILL; |
| 895 |
info.si_errno = 0;
|
| 896 |
switch (env->error_code & 0xF) { |
| 897 |
case POWERPC_EXCP_PRIV_OPC:
|
| 898 |
info.si_code = TARGET_ILL_PRVOPC; |
| 899 |
break;
|
| 900 |
case POWERPC_EXCP_PRIV_REG:
|
| 901 |
info.si_code = TARGET_ILL_PRVREG; |
| 902 |
break;
|
| 903 |
default:
|
| 904 |
EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
|
| 905 |
env->error_code & 0xF);
|
| 906 |
info.si_code = TARGET_ILL_PRVOPC; |
| 907 |
break;
|
| 908 |
} |
| 909 |
break;
|
| 910 |
case POWERPC_EXCP_TRAP:
|
| 911 |
cpu_abort(env, "Tried to call a TRAP\n");
|
| 912 |
break;
|
| 913 |
default:
|
| 914 |
/* Should not happen ! */
|
| 915 |
cpu_abort(env, "Unknown program exception (%02x)\n",
|
| 916 |
env->error_code); |
| 917 |
break;
|
| 918 |
} |
| 919 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 920 |
queue_signal(info.si_signo, &info); |
| 921 |
break;
|
| 922 |
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
| 923 |
EXCP_DUMP(env, "No floating point allowed\n");
|
| 924 |
info.si_signo = TARGET_SIGILL; |
| 925 |
info.si_errno = 0;
|
| 926 |
info.si_code = TARGET_ILL_COPROC; |
| 927 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 928 |
queue_signal(info.si_signo, &info); |
| 929 |
break;
|
| 930 |
case POWERPC_EXCP_SYSCALL: /* System call exception */ |
| 931 |
cpu_abort(env, "Syscall exception while in user mode. "
|
| 932 |
"Aborting\n");
|
| 933 |
break;
|
| 934 |
case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
| 935 |
EXCP_DUMP(env, "No APU instruction allowed\n");
|
| 936 |
info.si_signo = TARGET_SIGILL; |
| 937 |
info.si_errno = 0;
|
| 938 |
info.si_code = TARGET_ILL_COPROC; |
| 939 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 940 |
queue_signal(info.si_signo, &info); |
| 941 |
break;
|
| 942 |
case POWERPC_EXCP_DECR: /* Decrementer exception */ |
| 943 |
cpu_abort(env, "Decrementer interrupt while in user mode. "
|
| 944 |
"Aborting\n");
|
| 945 |
break;
|
| 946 |
case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
| 947 |
cpu_abort(env, "Fix interval timer interrupt while in user mode. "
|
| 948 |
"Aborting\n");
|
| 949 |
break;
|
| 950 |
case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ |
| 951 |
cpu_abort(env, "Watchdog timer interrupt while in user mode. "
|
| 952 |
"Aborting\n");
|
| 953 |
break;
|
| 954 |
case POWERPC_EXCP_DTLB: /* Data TLB error */ |
| 955 |
cpu_abort(env, "Data TLB exception while in user mode. "
|
| 956 |
"Aborting\n");
|
| 957 |
break;
|
| 958 |
case POWERPC_EXCP_ITLB: /* Instruction TLB error */ |
| 959 |
cpu_abort(env, "Instruction TLB exception while in user mode. "
|
| 960 |
"Aborting\n");
|
| 961 |
break;
|
| 962 |
case POWERPC_EXCP_DEBUG: /* Debug interrupt */ |
| 963 |
/* XXX: check this */
|
| 964 |
{
|
| 965 |
int sig;
|
| 966 |
|
| 967 |
sig = gdb_handlesig(env, TARGET_SIGTRAP); |
| 968 |
if (sig) {
|
| 969 |
info.si_signo = sig; |
| 970 |
info.si_errno = 0;
|
| 971 |
info.si_code = TARGET_TRAP_BRKPT; |
| 972 |
queue_signal(info.si_signo, &info); |
| 973 |
} |
| 974 |
} |
| 975 |
break;
|
| 976 |
#if defined(TARGET_PPCEMB)
|
| 977 |
case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ |
| 978 |
EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
|
| 979 |
info.si_signo = TARGET_SIGILL; |
| 980 |
info.si_errno = 0;
|
| 981 |
info.si_code = TARGET_ILL_COPROC; |
| 982 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 983 |
queue_signal(info.si_signo, &info); |
| 984 |
break;
|
| 985 |
case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ |
| 986 |
cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
|
| 987 |
break;
|
| 988 |
case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ |
| 989 |
cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
|
| 990 |
break;
|
| 991 |
case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ |
| 992 |
cpu_abort(env, "Performance monitor exception not handled\n");
|
| 993 |
break;
|
| 994 |
case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ |
| 995 |
cpu_abort(env, "Doorbell interrupt while in user mode. "
|
| 996 |
"Aborting\n");
|
| 997 |
break;
|
| 998 |
case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ |
| 999 |
cpu_abort(env, "Doorbell critical interrupt while in user mode. "
|
| 1000 |
"Aborting\n");
|
| 1001 |
break;
|
| 1002 |
case POWERPC_EXCP_RESET: /* System reset exception */ |
| 1003 |
cpu_abort(env, "Reset interrupt while in user mode. "
|
| 1004 |
"Aborting\n");
|
| 1005 |
break;
|
| 1006 |
#endif /* defined(TARGET_PPCEMB) */ |
| 1007 |
#if defined(TARGET_PPC64) /* PowerPC 64 */ |
| 1008 |
case POWERPC_EXCP_DSEG: /* Data segment exception */ |
| 1009 |
cpu_abort(env, "Data segment exception while in user mode. "
|
| 1010 |
"Aborting\n");
|
| 1011 |
break;
|
| 1012 |
case POWERPC_EXCP_ISEG: /* Instruction segment exception */ |
| 1013 |
cpu_abort(env, "Instruction segment exception "
|
| 1014 |
"while in user mode. Aborting\n");
|
| 1015 |
break;
|
| 1016 |
#endif /* defined(TARGET_PPC64) */ |
| 1017 |
#if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ |
| 1018 |
case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ |
| 1019 |
cpu_abort(env, "Hypervisor decrementer interrupt "
|
| 1020 |
"while in user mode. Aborting\n");
|
| 1021 |
break;
|
| 1022 |
#endif /* defined(TARGET_PPC64H) */ |
| 1023 |
case POWERPC_EXCP_TRACE: /* Trace exception */ |
| 1024 |
/* Nothing to do:
|
| 1025 |
* we use this exception to emulate step-by-step execution mode.
|
| 1026 |
*/
|
| 1027 |
break;
|
| 1028 |
#if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ |
| 1029 |
case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ |
| 1030 |
cpu_abort(env, "Hypervisor data storage exception "
|
| 1031 |
"while in user mode. Aborting\n");
|
| 1032 |
break;
|
| 1033 |
case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ |
| 1034 |
cpu_abort(env, "Hypervisor instruction storage exception "
|
| 1035 |
"while in user mode. Aborting\n");
|
| 1036 |
break;
|
| 1037 |
case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ |
| 1038 |
cpu_abort(env, "Hypervisor data segment exception "
|
| 1039 |
"while in user mode. Aborting\n");
|
| 1040 |
break;
|
| 1041 |
case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ |
| 1042 |
cpu_abort(env, "Hypervisor instruction segment exception "
|
| 1043 |
"while in user mode. Aborting\n");
|
| 1044 |
break;
|
| 1045 |
#endif /* defined(TARGET_PPC64H) */ |
| 1046 |
case POWERPC_EXCP_VPU: /* Vector unavailable exception */ |
| 1047 |
EXCP_DUMP(env, "No Altivec instructions allowed\n");
|
| 1048 |
info.si_signo = TARGET_SIGILL; |
| 1049 |
info.si_errno = 0;
|
| 1050 |
info.si_code = TARGET_ILL_COPROC; |
| 1051 |
info._sifields._sigfault._addr = env->nip - 4;
|
| 1052 |
queue_signal(info.si_signo, &info); |
| 1053 |
break;
|
| 1054 |
case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ |
| 1055 |
cpu_abort(env, "Programable interval timer interrupt "
|
| 1056 |
"while in user mode. Aborting\n");
|
| 1057 |
break;
|
| 1058 |
case POWERPC_EXCP_IO: /* IO error exception */ |
| 1059 |
cpu_abort(env, "IO error exception while in user mode. "
|
| 1060 |
"Aborting\n");
|
| 1061 |
break;
|
| 1062 |
case POWERPC_EXCP_RUNM: /* Run mode exception */ |
| 1063 |
cpu_abort(env, "Run mode exception while in user mode. "
|
| 1064 |
"Aborting\n");
|
| 1065 |
break;
|
| 1066 |
case POWERPC_EXCP_EMUL: /* Emulation trap exception */ |
| 1067 |
cpu_abort(env, "Emulation trap exception not handled\n");
|
| 1068 |
break;
|
| 1069 |
case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ |
| 1070 |
cpu_abort(env, "Instruction fetch TLB exception "
|
| 1071 |
"while in user-mode. Aborting");
|
| 1072 |
break;
|
| 1073 |
case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ |
| 1074 |
cpu_abort(env, "Data load TLB exception while in user-mode. "
|
| 1075 |
"Aborting");
|
| 1076 |
break;
|
| 1077 |
case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ |
| 1078 |
cpu_abort(env, "Data store TLB exception while in user-mode. "
|
| 1079 |
"Aborting");
|
| 1080 |
break;
|
| 1081 |
case POWERPC_EXCP_FPA: /* Floating-point assist exception */ |
| 1082 |
cpu_abort(env, "Floating-point assist exception not handled\n");
|
| 1083 |
break;
|
| 1084 |
case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ |
| 1085 |
cpu_abort(env, "Instruction address breakpoint exception "
|
| 1086 |
"not handled\n");
|
| 1087 |
break;
|
| 1088 |
case POWERPC_EXCP_SMI: /* System management interrupt */ |
| 1089 |
cpu_abort(env, "System management interrupt while in user mode. "
|
| 1090 |
"Aborting\n");
|
| 1091 |
break;
|
| 1092 |
case POWERPC_EXCP_THERM: /* Thermal interrupt */ |
| 1093 |
cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
|
| 1094 |
"Aborting\n");
|
| 1095 |
break;
|
| 1096 |
case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ |
| 1097 |
cpu_abort(env, "Performance monitor exception not handled\n");
|
| 1098 |
break;
|
| 1099 |
case POWERPC_EXCP_VPUA: /* Vector assist exception */ |
| 1100 |
cpu_abort(env, "Vector assist exception not handled\n");
|
| 1101 |
break;
|
| 1102 |
case POWERPC_EXCP_SOFTP: /* Soft patch exception */ |
| 1103 |
cpu_abort(env, "Soft patch exception not handled\n");
|
| 1104 |
break;
|
| 1105 |
case POWERPC_EXCP_MAINT: /* Maintenance exception */ |
| 1106 |
cpu_abort(env, "Maintenance exception while in user mode. "
|
| 1107 |
"Aborting\n");
|
| 1108 |
break;
|
| 1109 |
case POWERPC_EXCP_STOP: /* stop translation */ |
| 1110 |
/* We did invalidate the instruction cache. Go on */
|
| 1111 |
break;
|
| 1112 |
case POWERPC_EXCP_BRANCH: /* branch instruction: */ |
| 1113 |
/* We just stopped because of a branch. Go on */
|
| 1114 |
break;
|
| 1115 |
case POWERPC_EXCP_SYSCALL_USER:
|
| 1116 |
/* system call in user-mode emulation */
|
| 1117 |
/* WARNING:
|
| 1118 |
* PPC ABI uses overflow flag in cr0 to signal an error
|
| 1119 |
* in syscalls.
|
| 1120 |
*/
|
| 1121 |
#if 0
|
| 1122 |
printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
|
| 1123 |
env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
|
| 1124 |
#endif
|
| 1125 |
env->crf[0] &= ~0x1; |
| 1126 |
ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], |
| 1127 |
env->gpr[5], env->gpr[6], env->gpr[7], |
| 1128 |
env->gpr[8]);
|
| 1129 |
if (ret > (uint32_t)(-515)) { |
| 1130 |
env->crf[0] |= 0x1; |
| 1131 |
ret = -ret; |
| 1132 |
} |
| 1133 |
env->gpr[3] = ret;
|
| 1134 |
#if 0
|
| 1135 |
printf("syscall returned 0x%08x (%d)\n", ret, ret);
|
| 1136 |
#endif
|
| 1137 |
break;
|
| 1138 |
case EXCP_INTERRUPT:
|
| 1139 |
/* just indicate that signals should be handled asap */
|
| 1140 |
break;
|
| 1141 |
default:
|
| 1142 |
cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
|
| 1143 |
break;
|
| 1144 |
} |
| 1145 |
process_pending_signals(env); |
| 1146 |
} |
| 1147 |
} |
| 1148 |
#endif
|
| 1149 |
|
| 1150 |
#ifdef TARGET_MIPS
|
| 1151 |
|
| 1152 |
#define MIPS_SYS(name, args) args,
|
| 1153 |
|
| 1154 |
static const uint8_t mips_syscall_args[] = { |
| 1155 |
MIPS_SYS(sys_syscall , 0) /* 4000 */ |
| 1156 |
MIPS_SYS(sys_exit , 1)
|
| 1157 |
MIPS_SYS(sys_fork , 0)
|
| 1158 |
MIPS_SYS(sys_read , 3)
|
| 1159 |
MIPS_SYS(sys_write , 3)
|
| 1160 |
MIPS_SYS(sys_open , 3) /* 4005 */ |
| 1161 |
MIPS_SYS(sys_close , 1)
|
| 1162 |
MIPS_SYS(sys_waitpid , 3)
|
| 1163 |
MIPS_SYS(sys_creat , 2)
|
| 1164 |
MIPS_SYS(sys_link , 2)
|
| 1165 |
MIPS_SYS(sys_unlink , 1) /* 4010 */ |
| 1166 |
MIPS_SYS(sys_execve , 0)
|
| 1167 |
MIPS_SYS(sys_chdir , 1)
|
| 1168 |
MIPS_SYS(sys_time , 1)
|
| 1169 |
MIPS_SYS(sys_mknod , 3)
|
| 1170 |
MIPS_SYS(sys_chmod , 2) /* 4015 */ |
| 1171 |
MIPS_SYS(sys_lchown , 3)
|
| 1172 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1173 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ |
| 1174 |
MIPS_SYS(sys_lseek , 3)
|
| 1175 |
MIPS_SYS(sys_getpid , 0) /* 4020 */ |
| 1176 |
MIPS_SYS(sys_mount , 5)
|
| 1177 |
MIPS_SYS(sys_oldumount , 1)
|
| 1178 |
MIPS_SYS(sys_setuid , 1)
|
| 1179 |
MIPS_SYS(sys_getuid , 0)
|
| 1180 |
MIPS_SYS(sys_stime , 1) /* 4025 */ |
| 1181 |
MIPS_SYS(sys_ptrace , 4)
|
| 1182 |
MIPS_SYS(sys_alarm , 1)
|
| 1183 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ |
| 1184 |
MIPS_SYS(sys_pause , 0)
|
| 1185 |
MIPS_SYS(sys_utime , 2) /* 4030 */ |
| 1186 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1187 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1188 |
MIPS_SYS(sys_access , 2)
|
| 1189 |
MIPS_SYS(sys_nice , 1)
|
| 1190 |
MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ |
| 1191 |
MIPS_SYS(sys_sync , 0)
|
| 1192 |
MIPS_SYS(sys_kill , 2)
|
| 1193 |
MIPS_SYS(sys_rename , 2)
|
| 1194 |
MIPS_SYS(sys_mkdir , 2)
|
| 1195 |
MIPS_SYS(sys_rmdir , 1) /* 4040 */ |
| 1196 |
MIPS_SYS(sys_dup , 1)
|
| 1197 |
MIPS_SYS(sys_pipe , 0)
|
| 1198 |
MIPS_SYS(sys_times , 1)
|
| 1199 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1200 |
MIPS_SYS(sys_brk , 1) /* 4045 */ |
| 1201 |
MIPS_SYS(sys_setgid , 1)
|
| 1202 |
MIPS_SYS(sys_getgid , 0)
|
| 1203 |
MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ |
| 1204 |
MIPS_SYS(sys_geteuid , 0)
|
| 1205 |
MIPS_SYS(sys_getegid , 0) /* 4050 */ |
| 1206 |
MIPS_SYS(sys_acct , 0)
|
| 1207 |
MIPS_SYS(sys_umount , 2)
|
| 1208 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1209 |
MIPS_SYS(sys_ioctl , 3)
|
| 1210 |
MIPS_SYS(sys_fcntl , 3) /* 4055 */ |
| 1211 |
MIPS_SYS(sys_ni_syscall , 2)
|
| 1212 |
MIPS_SYS(sys_setpgid , 2)
|
| 1213 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1214 |
MIPS_SYS(sys_olduname , 1)
|
| 1215 |
MIPS_SYS(sys_umask , 1) /* 4060 */ |
| 1216 |
MIPS_SYS(sys_chroot , 1)
|
| 1217 |
MIPS_SYS(sys_ustat , 2)
|
| 1218 |
MIPS_SYS(sys_dup2 , 2)
|
| 1219 |
MIPS_SYS(sys_getppid , 0)
|
| 1220 |
MIPS_SYS(sys_getpgrp , 0) /* 4065 */ |
| 1221 |
MIPS_SYS(sys_setsid , 0)
|
| 1222 |
MIPS_SYS(sys_sigaction , 3)
|
| 1223 |
MIPS_SYS(sys_sgetmask , 0)
|
| 1224 |
MIPS_SYS(sys_ssetmask , 1)
|
| 1225 |
MIPS_SYS(sys_setreuid , 2) /* 4070 */ |
| 1226 |
MIPS_SYS(sys_setregid , 2)
|
| 1227 |
MIPS_SYS(sys_sigsuspend , 0)
|
| 1228 |
MIPS_SYS(sys_sigpending , 1)
|
| 1229 |
MIPS_SYS(sys_sethostname , 2)
|
| 1230 |
MIPS_SYS(sys_setrlimit , 2) /* 4075 */ |
| 1231 |
MIPS_SYS(sys_getrlimit , 2)
|
| 1232 |
MIPS_SYS(sys_getrusage , 2)
|
| 1233 |
MIPS_SYS(sys_gettimeofday, 2)
|
| 1234 |
MIPS_SYS(sys_settimeofday, 2)
|
| 1235 |
MIPS_SYS(sys_getgroups , 2) /* 4080 */ |
| 1236 |
MIPS_SYS(sys_setgroups , 2)
|
| 1237 |
MIPS_SYS(sys_ni_syscall , 0) /* old_select */ |
| 1238 |
MIPS_SYS(sys_symlink , 2)
|
| 1239 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ |
| 1240 |
MIPS_SYS(sys_readlink , 3) /* 4085 */ |
| 1241 |
MIPS_SYS(sys_uselib , 1)
|
| 1242 |
MIPS_SYS(sys_swapon , 2)
|
| 1243 |
MIPS_SYS(sys_reboot , 3)
|
| 1244 |
MIPS_SYS(old_readdir , 3)
|
| 1245 |
MIPS_SYS(old_mmap , 6) /* 4090 */ |
| 1246 |
MIPS_SYS(sys_munmap , 2)
|
| 1247 |
MIPS_SYS(sys_truncate , 2)
|
| 1248 |
MIPS_SYS(sys_ftruncate , 2)
|
| 1249 |
MIPS_SYS(sys_fchmod , 2)
|
| 1250 |
MIPS_SYS(sys_fchown , 3) /* 4095 */ |
| 1251 |
MIPS_SYS(sys_getpriority , 2)
|
| 1252 |
MIPS_SYS(sys_setpriority , 3)
|
| 1253 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1254 |
MIPS_SYS(sys_statfs , 2)
|
| 1255 |
MIPS_SYS(sys_fstatfs , 2) /* 4100 */ |
| 1256 |
MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ |
| 1257 |
MIPS_SYS(sys_socketcall , 2)
|
| 1258 |
MIPS_SYS(sys_syslog , 3)
|
| 1259 |
MIPS_SYS(sys_setitimer , 3)
|
| 1260 |
MIPS_SYS(sys_getitimer , 2) /* 4105 */ |
| 1261 |
MIPS_SYS(sys_newstat , 2)
|
| 1262 |
MIPS_SYS(sys_newlstat , 2)
|
| 1263 |
MIPS_SYS(sys_newfstat , 2)
|
| 1264 |
MIPS_SYS(sys_uname , 1)
|
| 1265 |
MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ |
| 1266 |
MIPS_SYS(sys_vhangup , 0)
|
| 1267 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ |
| 1268 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ |
| 1269 |
MIPS_SYS(sys_wait4 , 4)
|
| 1270 |
MIPS_SYS(sys_swapoff , 1) /* 4115 */ |
| 1271 |
MIPS_SYS(sys_sysinfo , 1)
|
| 1272 |
MIPS_SYS(sys_ipc , 6)
|
| 1273 |
MIPS_SYS(sys_fsync , 1)
|
| 1274 |
MIPS_SYS(sys_sigreturn , 0)
|
| 1275 |
MIPS_SYS(sys_clone , 0) /* 4120 */ |
| 1276 |
MIPS_SYS(sys_setdomainname, 2)
|
| 1277 |
MIPS_SYS(sys_newuname , 1)
|
| 1278 |
MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ |
| 1279 |
MIPS_SYS(sys_adjtimex , 1)
|
| 1280 |
MIPS_SYS(sys_mprotect , 3) /* 4125 */ |
| 1281 |
MIPS_SYS(sys_sigprocmask , 3)
|
| 1282 |
MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ |
| 1283 |
MIPS_SYS(sys_init_module , 5)
|
| 1284 |
MIPS_SYS(sys_delete_module, 1)
|
| 1285 |
MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ |
| 1286 |
MIPS_SYS(sys_quotactl , 0)
|
| 1287 |
MIPS_SYS(sys_getpgid , 1)
|
| 1288 |
MIPS_SYS(sys_fchdir , 1)
|
| 1289 |
MIPS_SYS(sys_bdflush , 2)
|
| 1290 |
MIPS_SYS(sys_sysfs , 3) /* 4135 */ |
| 1291 |
MIPS_SYS(sys_personality , 1)
|
| 1292 |
MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ |
| 1293 |
MIPS_SYS(sys_setfsuid , 1)
|
| 1294 |
MIPS_SYS(sys_setfsgid , 1)
|
| 1295 |
MIPS_SYS(sys_llseek , 5) /* 4140 */ |
| 1296 |
MIPS_SYS(sys_getdents , 3)
|
| 1297 |
MIPS_SYS(sys_select , 5)
|
| 1298 |
MIPS_SYS(sys_flock , 2)
|
| 1299 |
MIPS_SYS(sys_msync , 3)
|
| 1300 |
MIPS_SYS(sys_readv , 3) /* 4145 */ |
| 1301 |
MIPS_SYS(sys_writev , 3)
|
| 1302 |
MIPS_SYS(sys_cacheflush , 3)
|
| 1303 |
MIPS_SYS(sys_cachectl , 3)
|
| 1304 |
MIPS_SYS(sys_sysmips , 4)
|
| 1305 |
MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ |
| 1306 |
MIPS_SYS(sys_getsid , 1)
|
| 1307 |
MIPS_SYS(sys_fdatasync , 0)
|
| 1308 |
MIPS_SYS(sys_sysctl , 1)
|
| 1309 |
MIPS_SYS(sys_mlock , 2)
|
| 1310 |
MIPS_SYS(sys_munlock , 2) /* 4155 */ |
| 1311 |
MIPS_SYS(sys_mlockall , 1)
|
| 1312 |
MIPS_SYS(sys_munlockall , 0)
|
| 1313 |
MIPS_SYS(sys_sched_setparam, 2)
|
| 1314 |
MIPS_SYS(sys_sched_getparam, 2)
|
| 1315 |
MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ |
| 1316 |
MIPS_SYS(sys_sched_getscheduler, 1)
|
| 1317 |
MIPS_SYS(sys_sched_yield , 0)
|
| 1318 |
MIPS_SYS(sys_sched_get_priority_max, 1)
|
| 1319 |
MIPS_SYS(sys_sched_get_priority_min, 1)
|
| 1320 |
MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ |
| 1321 |
MIPS_SYS(sys_nanosleep, 2)
|
| 1322 |
MIPS_SYS(sys_mremap , 4)
|
| 1323 |
MIPS_SYS(sys_accept , 3)
|
| 1324 |
MIPS_SYS(sys_bind , 3)
|
| 1325 |
MIPS_SYS(sys_connect , 3) /* 4170 */ |
| 1326 |
MIPS_SYS(sys_getpeername , 3)
|
| 1327 |
MIPS_SYS(sys_getsockname , 3)
|
| 1328 |
MIPS_SYS(sys_getsockopt , 5)
|
| 1329 |
MIPS_SYS(sys_listen , 2)
|
| 1330 |
MIPS_SYS(sys_recv , 4) /* 4175 */ |
| 1331 |
MIPS_SYS(sys_recvfrom , 6)
|
| 1332 |
MIPS_SYS(sys_recvmsg , 3)
|
| 1333 |
MIPS_SYS(sys_send , 4)
|
| 1334 |
MIPS_SYS(sys_sendmsg , 3)
|
| 1335 |
MIPS_SYS(sys_sendto , 6) /* 4180 */ |
| 1336 |
MIPS_SYS(sys_setsockopt , 5)
|
| 1337 |
MIPS_SYS(sys_shutdown , 2)
|
| 1338 |
MIPS_SYS(sys_socket , 3)
|
| 1339 |
MIPS_SYS(sys_socketpair , 4)
|
| 1340 |
MIPS_SYS(sys_setresuid , 3) /* 4185 */ |
| 1341 |
MIPS_SYS(sys_getresuid , 3)
|
| 1342 |
MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ |
| 1343 |
MIPS_SYS(sys_poll , 3)
|
| 1344 |
MIPS_SYS(sys_nfsservctl , 3)
|
| 1345 |
MIPS_SYS(sys_setresgid , 3) /* 4190 */ |
| 1346 |
MIPS_SYS(sys_getresgid , 3)
|
| 1347 |
MIPS_SYS(sys_prctl , 5)
|
| 1348 |
MIPS_SYS(sys_rt_sigreturn, 0)
|
| 1349 |
MIPS_SYS(sys_rt_sigaction, 4)
|
| 1350 |
MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ |
| 1351 |
MIPS_SYS(sys_rt_sigpending, 2)
|
| 1352 |
MIPS_SYS(sys_rt_sigtimedwait, 4)
|
| 1353 |
MIPS_SYS(sys_rt_sigqueueinfo, 3)
|
| 1354 |
MIPS_SYS(sys_rt_sigsuspend, 0)
|
| 1355 |
MIPS_SYS(sys_pread64 , 6) /* 4200 */ |
| 1356 |
MIPS_SYS(sys_pwrite64 , 6)
|
| 1357 |
MIPS_SYS(sys_chown , 3)
|
| 1358 |
MIPS_SYS(sys_getcwd , 2)
|
| 1359 |
MIPS_SYS(sys_capget , 2)
|
| 1360 |
MIPS_SYS(sys_capset , 2) /* 4205 */ |
| 1361 |
MIPS_SYS(sys_sigaltstack , 0)
|
| 1362 |
MIPS_SYS(sys_sendfile , 4)
|
| 1363 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1364 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1365 |
MIPS_SYS(sys_mmap2 , 6) /* 4210 */ |
| 1366 |
MIPS_SYS(sys_truncate64 , 4)
|
| 1367 |
MIPS_SYS(sys_ftruncate64 , 4)
|
| 1368 |
MIPS_SYS(sys_stat64 , 2)
|
| 1369 |
MIPS_SYS(sys_lstat64 , 2)
|
| 1370 |
MIPS_SYS(sys_fstat64 , 2) /* 4215 */ |
| 1371 |
MIPS_SYS(sys_pivot_root , 2)
|
| 1372 |
MIPS_SYS(sys_mincore , 3)
|
| 1373 |
MIPS_SYS(sys_madvise , 3)
|
| 1374 |
MIPS_SYS(sys_getdents64 , 3)
|
| 1375 |
MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ |
| 1376 |
MIPS_SYS(sys_ni_syscall , 0)
|
| 1377 |
MIPS_SYS(sys_gettid , 0)
|
| 1378 |
MIPS_SYS(sys_readahead , 5)
|
| 1379 |
MIPS_SYS(sys_setxattr , 5)
|
| 1380 |
MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ |
| 1381 |
MIPS_SYS(sys_fsetxattr , 5)
|
| 1382 |
MIPS_SYS(sys_getxattr , 4)
|
| 1383 |
MIPS_SYS(sys_lgetxattr , 4)
|
| 1384 |
MIPS_SYS(sys_fgetxattr , 4)
|
| 1385 |
MIPS_SYS(sys_listxattr , 3) /* 4230 */ |
| 1386 |
MIPS_SYS(sys_llistxattr , 3)
|
| 1387 |
MIPS_SYS(sys_flistxattr , 3)
|
| 1388 |
MIPS_SYS(sys_removexattr , 2)
|
| 1389 |
MIPS_SYS(sys_lremovexattr, 2)
|
| 1390 |
MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ |
| 1391 |
MIPS_SYS(sys_tkill , 2)
|
| 1392 |
MIPS_SYS(sys_sendfile64 , 5)
|
| 1393 |
MIPS_SYS(sys_futex , 2)
|
| 1394 |
MIPS_SYS(sys_sched_setaffinity, 3)
|
| 1395 |
MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ |
| 1396 |
MIPS_SYS(sys_io_setup , 2)
|
| 1397 |
MIPS_SYS(sys_io_destroy , 1)
|
| 1398 |
MIPS_SYS(sys_io_getevents, 5)
|
| 1399 |
MIPS_SYS(sys_io_submit , 3)
|
| 1400 |
MIPS_SYS(sys_io_cancel , 3) /* 4245 */ |
| 1401 |
MIPS_SYS(sys_exit_group , 1)
|
| 1402 |
MIPS_SYS(sys_lookup_dcookie, 3)
|
| 1403 |
MIPS_SYS(sys_epoll_create, 1)
|
| 1404 |
MIPS_SYS(sys_epoll_ctl , 4)
|
| 1405 |
MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ |
| 1406 |
MIPS_SYS(sys_remap_file_pages, 5)
|
| 1407 |
MIPS_SYS(sys_set_tid_address, 1)
|
| 1408 |
MIPS_SYS(sys_restart_syscall, 0)
|
| 1409 |
MIPS_SYS(sys_fadvise64_64, 7)
|
| 1410 |
MIPS_SYS(sys_statfs64 , 3) /* 4255 */ |
| 1411 |
MIPS_SYS(sys_fstatfs64 , 2)
|
| 1412 |
MIPS_SYS(sys_timer_create, 3)
|
| 1413 |
MIPS_SYS(sys_timer_settime, 4)
|
| 1414 |
MIPS_SYS(sys_timer_gettime, 2)
|
| 1415 |
MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ |
| 1416 |
MIPS_SYS(sys_timer_delete, 1)
|
| 1417 |
MIPS_SYS(sys_clock_settime, 2)
|
| 1418 |
MIPS_SYS(sys_clock_gettime, 2)
|
| 1419 |
MIPS_SYS(sys_clock_getres, 2)
|
| 1420 |
MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ |
| 1421 |
MIPS_SYS(sys_tgkill , 3)
|
| 1422 |
MIPS_SYS(sys_utimes , 2)
|
| 1423 |
MIPS_SYS(sys_mbind , 4)
|
| 1424 |
MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ |
| 1425 |
MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ |
| 1426 |
MIPS_SYS(sys_mq_open , 4)
|
| 1427 |
MIPS_SYS(sys_mq_unlink , 1)
|
| 1428 |
MIPS_SYS(sys_mq_timedsend, 5)
|
| 1429 |
MIPS_SYS(sys_mq_timedreceive, 5)
|
| 1430 |
MIPS_SYS(sys_mq_notify , 2) /* 4275 */ |
| 1431 |
MIPS_SYS(sys_mq_getsetattr, 3)
|
| 1432 |
MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ |
| 1433 |
MIPS_SYS(sys_waitid , 4)
|
| 1434 |
MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ |
| 1435 |
MIPS_SYS(sys_add_key , 5)
|
| 1436 |
MIPS_SYS(sys_request_key, 4)
|
| 1437 |
MIPS_SYS(sys_keyctl , 5)
|
| 1438 |
MIPS_SYS(sys_set_thread_area, 1)
|
| 1439 |
MIPS_SYS(sys_inotify_init, 0)
|
| 1440 |
MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ |
| 1441 |
MIPS_SYS(sys_inotify_rm_watch, 2)
|
| 1442 |
MIPS_SYS(sys_migrate_pages, 4)
|
| 1443 |
MIPS_SYS(sys_openat, 4)
|
| 1444 |
MIPS_SYS(sys_mkdirat, 3)
|
| 1445 |
MIPS_SYS(sys_mknodat, 4) /* 4290 */ |
| 1446 |
MIPS_SYS(sys_fchownat, 5)
|
| 1447 |
MIPS_SYS(sys_futimesat, 3)
|
| 1448 |
MIPS_SYS(sys_fstatat64, 4)
|
| 1449 |
MIPS_SYS(sys_unlinkat, 3)
|
| 1450 |
MIPS_SYS(sys_renameat, 4) /* 4295 */ |
| 1451 |
MIPS_SYS(sys_linkat, 5)
|
| 1452 |
MIPS_SYS(sys_symlinkat, 3)
|
| 1453 |
MIPS_SYS(sys_readlinkat, 4)
|
| 1454 |
MIPS_SYS(sys_fchmodat, 3)
|
| 1455 |
MIPS_SYS(sys_faccessat, 3) /* 4300 */ |
| 1456 |
MIPS_SYS(sys_pselect6, 6)
|
| 1457 |
MIPS_SYS(sys_ppoll, 5)
|
| 1458 |
MIPS_SYS(sys_unshare, 1)
|
| 1459 |
MIPS_SYS(sys_splice, 4)
|
| 1460 |
MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ |
| 1461 |
MIPS_SYS(sys_tee, 4)
|
| 1462 |
MIPS_SYS(sys_vmsplice, 4)
|
| 1463 |
MIPS_SYS(sys_move_pages, 6)
|
| 1464 |
MIPS_SYS(sys_set_robust_list, 2)
|
| 1465 |
MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ |
| 1466 |
MIPS_SYS(sys_kexec_load, 4)
|
| 1467 |
MIPS_SYS(sys_getcpu, 3)
|
| 1468 |
MIPS_SYS(sys_epoll_pwait, 6)
|
| 1469 |
MIPS_SYS(sys_ioprio_set, 3)
|
| 1470 |
MIPS_SYS(sys_ioprio_get, 2)
|
| 1471 |
}; |
| 1472 |
|
| 1473 |
#undef MIPS_SYS
|
| 1474 |
|
| 1475 |
void cpu_loop(CPUMIPSState *env)
|
| 1476 |
{
|
| 1477 |
target_siginfo_t info; |
| 1478 |
int trapnr, ret;
|
| 1479 |
unsigned int syscall_num; |
| 1480 |
|
| 1481 |
for(;;) {
|
| 1482 |
trapnr = cpu_mips_exec(env); |
| 1483 |
switch(trapnr) {
|
| 1484 |
case EXCP_SYSCALL:
|
| 1485 |
syscall_num = env->gpr[2][env->current_tc] - 4000; |
| 1486 |
env->PC[env->current_tc] += 4;
|
| 1487 |
if (syscall_num >= sizeof(mips_syscall_args)) { |
| 1488 |
ret = -ENOSYS; |
| 1489 |
} else {
|
| 1490 |
int nb_args;
|
| 1491 |
target_ulong sp_reg; |
| 1492 |
target_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; |
| 1493 |
|
| 1494 |
nb_args = mips_syscall_args[syscall_num]; |
| 1495 |
sp_reg = env->gpr[29][env->current_tc];
|
| 1496 |
switch (nb_args) {
|
| 1497 |
/* these arguments are taken from the stack */
|
| 1498 |
case 8: arg8 = tgetl(sp_reg + 28); |
| 1499 |
case 7: arg7 = tgetl(sp_reg + 24); |
| 1500 |
case 6: arg6 = tgetl(sp_reg + 20); |
| 1501 |
case 5: arg5 = tgetl(sp_reg + 16); |
| 1502 |
default:
|
| 1503 |
break;
|
| 1504 |
} |
| 1505 |
ret = do_syscall(env, env->gpr[2][env->current_tc],
|
| 1506 |
env->gpr[4][env->current_tc],
|
| 1507 |
env->gpr[5][env->current_tc],
|
| 1508 |
env->gpr[6][env->current_tc],
|
| 1509 |
env->gpr[7][env->current_tc],
|
| 1510 |
arg5, arg6/*, arg7, arg8*/);
|
| 1511 |
} |
| 1512 |
if ((unsigned int)ret >= (unsigned int)(-1133)) { |
| 1513 |
env->gpr[7][env->current_tc] = 1; /* error flag */ |
| 1514 |
ret = -ret; |
| 1515 |
} else {
|
| 1516 |
env->gpr[7][env->current_tc] = 0; /* error flag */ |
| 1517 |
} |
| 1518 |
env->gpr[2][env->current_tc] = ret;
|
| 1519 |
break;
|
| 1520 |
case EXCP_TLBL:
|
| 1521 |
case EXCP_TLBS:
|
| 1522 |
case EXCP_CpU:
|
| 1523 |
case EXCP_RI:
|
| 1524 |
info.si_signo = TARGET_SIGILL; |
| 1525 |
info.si_errno = 0;
|
| 1526 |
info.si_code = 0;
|
| 1527 |
queue_signal(info.si_signo, &info); |
| 1528 |
break;
|
| 1529 |
case EXCP_INTERRUPT:
|
| 1530 |
/* just indicate that signals should be handled asap */
|
| 1531 |
break;
|
| 1532 |
case EXCP_DEBUG:
|
| 1533 |
{
|
| 1534 |
int sig;
|
| 1535 |
|
| 1536 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 1537 |
if (sig)
|
| 1538 |
{
|
| 1539 |
info.si_signo = sig; |
| 1540 |
info.si_errno = 0;
|
| 1541 |
info.si_code = TARGET_TRAP_BRKPT; |
| 1542 |
queue_signal(info.si_signo, &info); |
| 1543 |
} |
| 1544 |
} |
| 1545 |
break;
|
| 1546 |
default:
|
| 1547 |
// error:
|
| 1548 |
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
| 1549 |
trapnr); |
| 1550 |
cpu_dump_state(env, stderr, fprintf, 0);
|
| 1551 |
abort(); |
| 1552 |
} |
| 1553 |
process_pending_signals(env); |
| 1554 |
} |
| 1555 |
} |
| 1556 |
#endif
|
| 1557 |
|
| 1558 |
#ifdef TARGET_SH4
|
| 1559 |
void cpu_loop (CPUState *env)
|
| 1560 |
{
|
| 1561 |
int trapnr, ret;
|
| 1562 |
target_siginfo_t info; |
| 1563 |
|
| 1564 |
while (1) { |
| 1565 |
trapnr = cpu_sh4_exec (env); |
| 1566 |
|
| 1567 |
switch (trapnr) {
|
| 1568 |
case 0x160: |
| 1569 |
ret = do_syscall(env, |
| 1570 |
env->gregs[3],
|
| 1571 |
env->gregs[4],
|
| 1572 |
env->gregs[5],
|
| 1573 |
env->gregs[6],
|
| 1574 |
env->gregs[7],
|
| 1575 |
env->gregs[0],
|
| 1576 |
0);
|
| 1577 |
env->gregs[0] = ret;
|
| 1578 |
env->pc += 2;
|
| 1579 |
break;
|
| 1580 |
case EXCP_DEBUG:
|
| 1581 |
{
|
| 1582 |
int sig;
|
| 1583 |
|
| 1584 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 1585 |
if (sig)
|
| 1586 |
{
|
| 1587 |
info.si_signo = sig; |
| 1588 |
info.si_errno = 0;
|
| 1589 |
info.si_code = TARGET_TRAP_BRKPT; |
| 1590 |
queue_signal(info.si_signo, &info); |
| 1591 |
} |
| 1592 |
} |
| 1593 |
break;
|
| 1594 |
default:
|
| 1595 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
| 1596 |
cpu_dump_state(env, stderr, fprintf, 0);
|
| 1597 |
exit (1);
|
| 1598 |
} |
| 1599 |
process_pending_signals (env); |
| 1600 |
} |
| 1601 |
} |
| 1602 |
#endif
|
| 1603 |
|
| 1604 |
#ifdef TARGET_M68K
|
| 1605 |
|
| 1606 |
void cpu_loop(CPUM68KState *env)
|
| 1607 |
{
|
| 1608 |
int trapnr;
|
| 1609 |
unsigned int n; |
| 1610 |
target_siginfo_t info; |
| 1611 |
TaskState *ts = env->opaque; |
| 1612 |
|
| 1613 |
for(;;) {
|
| 1614 |
trapnr = cpu_m68k_exec(env); |
| 1615 |
switch(trapnr) {
|
| 1616 |
case EXCP_ILLEGAL:
|
| 1617 |
{
|
| 1618 |
if (ts->sim_syscalls) {
|
| 1619 |
uint16_t nr; |
| 1620 |
nr = lduw(env->pc + 2);
|
| 1621 |
env->pc += 4;
|
| 1622 |
do_m68k_simcall(env, nr); |
| 1623 |
} else {
|
| 1624 |
goto do_sigill;
|
| 1625 |
} |
| 1626 |
} |
| 1627 |
break;
|
| 1628 |
case EXCP_HALT_INSN:
|
| 1629 |
/* Semihosing syscall. */
|
| 1630 |
env->pc += 4;
|
| 1631 |
do_m68k_semihosting(env, env->dregs[0]);
|
| 1632 |
break;
|
| 1633 |
case EXCP_LINEA:
|
| 1634 |
case EXCP_LINEF:
|
| 1635 |
case EXCP_UNSUPPORTED:
|
| 1636 |
do_sigill:
|
| 1637 |
info.si_signo = SIGILL; |
| 1638 |
info.si_errno = 0;
|
| 1639 |
info.si_code = TARGET_ILL_ILLOPN; |
| 1640 |
info._sifields._sigfault._addr = env->pc; |
| 1641 |
queue_signal(info.si_signo, &info); |
| 1642 |
break;
|
| 1643 |
case EXCP_TRAP0:
|
| 1644 |
{
|
| 1645 |
ts->sim_syscalls = 0;
|
| 1646 |
n = env->dregs[0];
|
| 1647 |
env->pc += 2;
|
| 1648 |
env->dregs[0] = do_syscall(env,
|
| 1649 |
n, |
| 1650 |
env->dregs[1],
|
| 1651 |
env->dregs[2],
|
| 1652 |
env->dregs[3],
|
| 1653 |
env->dregs[4],
|
| 1654 |
env->dregs[5],
|
| 1655 |
env->dregs[6]);
|
| 1656 |
} |
| 1657 |
break;
|
| 1658 |
case EXCP_INTERRUPT:
|
| 1659 |
/* just indicate that signals should be handled asap */
|
| 1660 |
break;
|
| 1661 |
case EXCP_ACCESS:
|
| 1662 |
{
|
| 1663 |
info.si_signo = SIGSEGV; |
| 1664 |
info.si_errno = 0;
|
| 1665 |
/* XXX: check env->error_code */
|
| 1666 |
info.si_code = TARGET_SEGV_MAPERR; |
| 1667 |
info._sifields._sigfault._addr = env->mmu.ar; |
| 1668 |
queue_signal(info.si_signo, &info); |
| 1669 |
} |
| 1670 |
break;
|
| 1671 |
case EXCP_DEBUG:
|
| 1672 |
{
|
| 1673 |
int sig;
|
| 1674 |
|
| 1675 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 1676 |
if (sig)
|
| 1677 |
{
|
| 1678 |
info.si_signo = sig; |
| 1679 |
info.si_errno = 0;
|
| 1680 |
info.si_code = TARGET_TRAP_BRKPT; |
| 1681 |
queue_signal(info.si_signo, &info); |
| 1682 |
} |
| 1683 |
} |
| 1684 |
break;
|
| 1685 |
default:
|
| 1686 |
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
| 1687 |
trapnr); |
| 1688 |
cpu_dump_state(env, stderr, fprintf, 0);
|
| 1689 |
abort(); |
| 1690 |
} |
| 1691 |
process_pending_signals(env); |
| 1692 |
} |
| 1693 |
} |
| 1694 |
#endif /* TARGET_M68K */ |
| 1695 |
|
| 1696 |
#ifdef TARGET_ALPHA
|
| 1697 |
void cpu_loop (CPUState *env)
|
| 1698 |
{
|
| 1699 |
int trapnr;
|
| 1700 |
target_siginfo_t info; |
| 1701 |
|
| 1702 |
while (1) { |
| 1703 |
trapnr = cpu_alpha_exec (env); |
| 1704 |
|
| 1705 |
switch (trapnr) {
|
| 1706 |
case EXCP_RESET:
|
| 1707 |
fprintf(stderr, "Reset requested. Exit\n");
|
| 1708 |
exit(1);
|
| 1709 |
break;
|
| 1710 |
case EXCP_MCHK:
|
| 1711 |
fprintf(stderr, "Machine check exception. Exit\n");
|
| 1712 |
exit(1);
|
| 1713 |
break;
|
| 1714 |
case EXCP_ARITH:
|
| 1715 |
fprintf(stderr, "Arithmetic trap.\n");
|
| 1716 |
exit(1);
|
| 1717 |
break;
|
| 1718 |
case EXCP_HW_INTERRUPT:
|
| 1719 |
fprintf(stderr, "External interrupt. Exit\n");
|
| 1720 |
exit(1);
|
| 1721 |
break;
|
| 1722 |
case EXCP_DFAULT:
|
| 1723 |
fprintf(stderr, "MMU data fault\n");
|
| 1724 |
exit(1);
|
| 1725 |
break;
|
| 1726 |
case EXCP_DTB_MISS_PAL:
|
| 1727 |
fprintf(stderr, "MMU data TLB miss in PALcode\n");
|
| 1728 |
exit(1);
|
| 1729 |
break;
|
| 1730 |
case EXCP_ITB_MISS:
|
| 1731 |
fprintf(stderr, "MMU instruction TLB miss\n");
|
| 1732 |
exit(1);
|
| 1733 |
break;
|
| 1734 |
case EXCP_ITB_ACV:
|
| 1735 |
fprintf(stderr, "MMU instruction access violation\n");
|
| 1736 |
exit(1);
|
| 1737 |
break;
|
| 1738 |
case EXCP_DTB_MISS_NATIVE:
|
| 1739 |
fprintf(stderr, "MMU data TLB miss\n");
|
| 1740 |
exit(1);
|
| 1741 |
break;
|
| 1742 |
case EXCP_UNALIGN:
|
| 1743 |
fprintf(stderr, "Unaligned access\n");
|
| 1744 |
exit(1);
|
| 1745 |
break;
|
| 1746 |
case EXCP_OPCDEC:
|
| 1747 |
fprintf(stderr, "Invalid instruction\n");
|
| 1748 |
exit(1);
|
| 1749 |
break;
|
| 1750 |
case EXCP_FEN:
|
| 1751 |
fprintf(stderr, "Floating-point not allowed\n");
|
| 1752 |
exit(1);
|
| 1753 |
break;
|
| 1754 |
case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): |
| 1755 |
fprintf(stderr, "Call to PALcode\n");
|
| 1756 |
call_pal(env, (trapnr >> 6) | 0x80); |
| 1757 |
break;
|
| 1758 |
case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): |
| 1759 |
fprintf(stderr, "Privileged call to PALcode\n");
|
| 1760 |
exit(1);
|
| 1761 |
break;
|
| 1762 |
case EXCP_DEBUG:
|
| 1763 |
{
|
| 1764 |
int sig;
|
| 1765 |
|
| 1766 |
sig = gdb_handlesig (env, TARGET_SIGTRAP); |
| 1767 |
if (sig)
|
| 1768 |
{
|
| 1769 |
info.si_signo = sig; |
| 1770 |
info.si_errno = 0;
|
| 1771 |
info.si_code = TARGET_TRAP_BRKPT; |
| 1772 |
queue_signal(info.si_signo, &info); |
| 1773 |
} |
| 1774 |
} |
| 1775 |
break;
|
| 1776 |
default:
|
| 1777 |
printf ("Unhandled trap: 0x%x\n", trapnr);
|
| 1778 |
cpu_dump_state(env, stderr, fprintf, 0);
|
| 1779 |
exit (1);
|
| 1780 |
} |
| 1781 |
process_pending_signals (env); |
| 1782 |
} |
| 1783 |
} |
| 1784 |
#endif /* TARGET_ALPHA */ |
| 1785 |
|
| 1786 |
void usage(void) |
| 1787 |
{
|
| 1788 |
printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n" |
| 1789 |
"usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n" |
| 1790 |
"Linux CPU emulator (compiled for %s emulation)\n"
|
| 1791 |
"\n"
|
| 1792 |
"-h print this help\n"
|
| 1793 |
"-g port wait gdb connection to port\n"
|
| 1794 |
"-L path set the elf interpreter prefix (default=%s)\n"
|
| 1795 |
"-s size set the stack size in bytes (default=%ld)\n"
|
| 1796 |
"-cpu model select CPU (-cpu ? for list)\n"
|
| 1797 |
"-drop-ld-preload drop LD_PRELOAD for target process\n"
|
| 1798 |
"\n"
|
| 1799 |
"debug options:\n"
|
| 1800 |
#ifdef USE_CODE_COPY
|
| 1801 |
"-no-code-copy disable code copy acceleration\n"
|
| 1802 |
#endif
|
| 1803 |
"-d options activate log (logfile=%s)\n"
|
| 1804 |
"-p pagesize set the host page size to 'pagesize'\n",
|
| 1805 |
TARGET_ARCH, |
| 1806 |
interp_prefix, |
| 1807 |
x86_stack_size, |
| 1808 |
DEBUG_LOGFILE); |
| 1809 |
_exit(1);
|
| 1810 |
} |
| 1811 |
|
| 1812 |
/* XXX: currently only used for async signals (see signal.c) */
|
| 1813 |
CPUState *global_env; |
| 1814 |
|
| 1815 |
/* used to free thread contexts */
|
| 1816 |
TaskState *first_task_state; |
| 1817 |
|
| 1818 |
int main(int argc, char **argv) |
| 1819 |
{
|
| 1820 |
const char *filename; |
| 1821 |
const char *cpu_model; |
| 1822 |
struct target_pt_regs regs1, *regs = ®s1;
|
| 1823 |
struct image_info info1, *info = &info1;
|
| 1824 |
TaskState ts1, *ts = &ts1; |
| 1825 |
CPUState *env; |
| 1826 |
int optind;
|
| 1827 |
const char *r; |
| 1828 |
int gdbstub_port = 0; |
| 1829 |
int drop_ld_preload = 0, environ_count = 0; |
| 1830 |
char **target_environ, **wrk, **dst;
|
| 1831 |
|
| 1832 |
if (argc <= 1) |
| 1833 |
usage(); |
| 1834 |
|
| 1835 |
/* init debug */
|
| 1836 |
cpu_set_log_filename(DEBUG_LOGFILE); |
| 1837 |
|
| 1838 |
cpu_model = NULL;
|
| 1839 |
optind = 1;
|
| 1840 |
for(;;) {
|
| 1841 |
if (optind >= argc)
|
| 1842 |
break;
|
| 1843 |
r = argv[optind]; |
| 1844 |
if (r[0] != '-') |
| 1845 |
break;
|
| 1846 |
optind++; |
| 1847 |
r++; |
| 1848 |
if (!strcmp(r, "-")) { |
| 1849 |
break;
|
| 1850 |
} else if (!strcmp(r, "d")) { |
| 1851 |
int mask;
|
| 1852 |
CPULogItem *item; |
| 1853 |
|
| 1854 |
if (optind >= argc)
|
| 1855 |
break;
|
| 1856 |
|
| 1857 |
r = argv[optind++]; |
| 1858 |
mask = cpu_str_to_log_mask(r); |
| 1859 |
if (!mask) {
|
| 1860 |
printf("Log items (comma separated):\n");
|
| 1861 |
for(item = cpu_log_items; item->mask != 0; item++) { |
| 1862 |
printf("%-10s %s\n", item->name, item->help);
|
| 1863 |
} |
| 1864 |
exit(1);
|
| 1865 |
} |
| 1866 |
cpu_set_log(mask); |
| 1867 |
} else if (!strcmp(r, "s")) { |
| 1868 |
r = argv[optind++]; |
| 1869 |
x86_stack_size = strtol(r, (char **)&r, 0); |
| 1870 |
if (x86_stack_size <= 0) |
| 1871 |
usage(); |
| 1872 |
if (*r == 'M') |
| 1873 |
x86_stack_size *= 1024 * 1024; |
| 1874 |
else if (*r == 'k' || *r == 'K') |
| 1875 |
x86_stack_size *= 1024;
|
| 1876 |
} else if (!strcmp(r, "L")) { |
| 1877 |
interp_prefix = argv[optind++]; |
| 1878 |
} else if (!strcmp(r, "p")) { |
| 1879 |
qemu_host_page_size = atoi(argv[optind++]); |
| 1880 |
if (qemu_host_page_size == 0 || |
| 1881 |
(qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { |
| 1882 |
fprintf(stderr, "page size must be a power of two\n");
|
| 1883 |
exit(1);
|
| 1884 |
} |
| 1885 |
} else if (!strcmp(r, "g")) { |
| 1886 |
gdbstub_port = atoi(argv[optind++]); |
| 1887 |
} else if (!strcmp(r, "r")) { |
| 1888 |
qemu_uname_release = argv[optind++]; |
| 1889 |
} else if (!strcmp(r, "cpu")) { |
| 1890 |
cpu_model = argv[optind++]; |
| 1891 |
if (strcmp(cpu_model, "?") == 0) { |
| 1892 |
#if defined(TARGET_PPC)
|
| 1893 |
ppc_cpu_list(stdout, &fprintf); |
| 1894 |
#elif defined(TARGET_ARM)
|
| 1895 |
arm_cpu_list(); |
| 1896 |
#elif defined(TARGET_MIPS)
|
| 1897 |
mips_cpu_list(stdout, &fprintf); |
| 1898 |
#elif defined(TARGET_SPARC)
|
| 1899 |
sparc_cpu_list(stdout, &fprintf); |
| 1900 |
#endif
|
| 1901 |
_exit(1);
|
| 1902 |
} |
| 1903 |
} else if (!strcmp(r, "drop-ld-preload")) { |
| 1904 |
drop_ld_preload = 1;
|
| 1905 |
} else
|
| 1906 |
#ifdef USE_CODE_COPY
|
| 1907 |
if (!strcmp(r, "no-code-copy")) { |
| 1908 |
code_copy_enabled = 0;
|
| 1909 |
} else
|
| 1910 |
#endif
|
| 1911 |
{
|
| 1912 |
usage(); |
| 1913 |
} |
| 1914 |
} |
| 1915 |
if (optind >= argc)
|
| 1916 |
usage(); |
| 1917 |
filename = argv[optind]; |
| 1918 |
|
| 1919 |
/* Zero out regs */
|
| 1920 |
memset(regs, 0, sizeof(struct target_pt_regs)); |
| 1921 |
|
| 1922 |
/* Zero out image_info */
|
| 1923 |
memset(info, 0, sizeof(struct image_info)); |
| 1924 |
|
| 1925 |
/* Scan interp_prefix dir for replacement files. */
|
| 1926 |
init_paths(interp_prefix); |
| 1927 |
|
| 1928 |
/* NOTE: we need to init the CPU at this stage to get
|
| 1929 |
qemu_host_page_size */
|
| 1930 |
env = cpu_init(); |
| 1931 |
global_env = env; |
| 1932 |
|
| 1933 |
wrk = environ; |
| 1934 |
while (*(wrk++))
|
| 1935 |
environ_count++; |
| 1936 |
|
| 1937 |
target_environ = malloc((environ_count + 1) * sizeof(char *)); |
| 1938 |
if (!target_environ)
|
| 1939 |
abort(); |
| 1940 |
for (wrk = environ, dst = target_environ; *wrk; wrk++) {
|
| 1941 |
if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11)) |
| 1942 |
continue;
|
| 1943 |
*(dst++) = strdup(*wrk); |
| 1944 |
} |
| 1945 |
*dst = NULL; /* NULL terminate target_environ */ |
| 1946 |
|
| 1947 |
if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) { |
| 1948 |
printf("Error loading %s\n", filename);
|
| 1949 |
_exit(1);
|
| 1950 |
} |
| 1951 |
|
| 1952 |
for (wrk = target_environ; *wrk; wrk++) {
|
| 1953 |
free(*wrk); |
| 1954 |
} |
| 1955 |
|
| 1956 |
free(target_environ); |
| 1957 |
|
| 1958 |
if (loglevel) {
|
| 1959 |
page_dump(logfile); |
| 1960 |
|
| 1961 |
fprintf(logfile, "start_brk 0x" TARGET_FMT_lx "\n", info->start_brk); |
| 1962 |
fprintf(logfile, "end_code 0x" TARGET_FMT_lx "\n", info->end_code); |
| 1963 |
fprintf(logfile, "start_code 0x" TARGET_FMT_lx "\n", |
| 1964 |
info->start_code); |
| 1965 |
fprintf(logfile, "start_data 0x" TARGET_FMT_lx "\n", |
| 1966 |
info->start_data); |
| 1967 |
fprintf(logfile, "end_data 0x" TARGET_FMT_lx "\n", info->end_data); |
| 1968 |
fprintf(logfile, "start_stack 0x" TARGET_FMT_lx "\n", |
| 1969 |
info->start_stack); |
| 1970 |
fprintf(logfile, "brk 0x" TARGET_FMT_lx "\n", info->brk); |
| 1971 |
fprintf(logfile, "entry 0x" TARGET_FMT_lx "\n", info->entry); |
| 1972 |
} |
| 1973 |
|
| 1974 |
target_set_brk(info->brk); |
| 1975 |
syscall_init(); |
| 1976 |
signal_init(); |
| 1977 |
|
| 1978 |
/* build Task State */
|
| 1979 |
memset(ts, 0, sizeof(TaskState)); |
| 1980 |
env->opaque = ts; |
| 1981 |
ts->used = 1;
|
| 1982 |
ts->info = info; |
| 1983 |
env->user_mode_only = 1;
|
| 1984 |
|
| 1985 |
#if defined(TARGET_I386)
|
| 1986 |
cpu_x86_set_cpl(env, 3);
|
| 1987 |
|
| 1988 |
env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
| 1989 |
env->hflags |= HF_PE_MASK; |
| 1990 |
if (env->cpuid_features & CPUID_SSE) {
|
| 1991 |
env->cr[4] |= CR4_OSFXSR_MASK;
|
| 1992 |
env->hflags |= HF_OSFXSR_MASK; |
| 1993 |
} |
| 1994 |
|
| 1995 |
/* flags setup : we activate the IRQs by default as in user mode */
|
| 1996 |
env->eflags |= IF_MASK; |
| 1997 |
|
| 1998 |
/* linux register setup */
|
| 1999 |
#if defined(TARGET_X86_64)
|
| 2000 |
env->regs[R_EAX] = regs->rax; |
| 2001 |
env->regs[R_EBX] = regs->rbx; |
| 2002 |
env->regs[R_ECX] = regs->rcx; |
| 2003 |
env->regs[R_EDX] = regs->rdx; |
| 2004 |
env->regs[R_ESI] = regs->rsi; |
| 2005 |
env->regs[R_EDI] = regs->rdi; |
| 2006 |
env->regs[R_EBP] = regs->rbp; |
| 2007 |
env->regs[R_ESP] = regs->rsp; |
| 2008 |
env->eip = regs->rip; |
| 2009 |
#else
|
| 2010 |
env->regs[R_EAX] = regs->eax; |
| 2011 |
env->regs[R_EBX] = regs->ebx; |
| 2012 |
env->regs[R_ECX] = regs->ecx; |
| 2013 |
env->regs[R_EDX] = regs->edx; |
| 2014 |
env->regs[R_ESI] = regs->esi; |
| 2015 |
env->regs[R_EDI] = regs->edi; |
| 2016 |
env->regs[R_EBP] = regs->ebp; |
| 2017 |
env->regs[R_ESP] = regs->esp; |
| 2018 |
env->eip = regs->eip; |
| 2019 |
#endif
|
| 2020 |
|
| 2021 |
/* linux interrupt setup */
|
| 2022 |
env->idt.base = h2g(idt_table); |
| 2023 |
env->idt.limit = sizeof(idt_table) - 1; |
| 2024 |
set_idt(0, 0); |
| 2025 |
set_idt(1, 0); |
| 2026 |
set_idt(2, 0); |
| 2027 |
set_idt(3, 3); |
| 2028 |
set_idt(4, 3); |
| 2029 |
set_idt(5, 3); |
| 2030 |
set_idt(6, 0); |
| 2031 |
set_idt(7, 0); |
| 2032 |
set_idt(8, 0); |
| 2033 |
set_idt(9, 0); |
| 2034 |
set_idt(10, 0); |
| 2035 |
set_idt(11, 0); |
| 2036 |
set_idt(12, 0); |
| 2037 |
set_idt(13, 0); |
| 2038 |
set_idt(14, 0); |
| 2039 |
set_idt(15, 0); |
| 2040 |
set_idt(16, 0); |
| 2041 |
set_idt(17, 0); |
| 2042 |
set_idt(18, 0); |
| 2043 |
set_idt(19, 0); |
| 2044 |
set_idt(0x80, 3); |
| 2045 |
|
| 2046 |
/* linux segment setup */
|
| 2047 |
env->gdt.base = h2g(gdt_table); |
| 2048 |
env->gdt.limit = sizeof(gdt_table) - 1; |
| 2049 |
write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
| 2050 |
DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
| 2051 |
(3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
| 2052 |
write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
| 2053 |
DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
| 2054 |
(3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
| 2055 |
cpu_x86_load_seg(env, R_CS, __USER_CS); |
| 2056 |
cpu_x86_load_seg(env, R_DS, __USER_DS); |
| 2057 |
cpu_x86_load_seg(env, R_ES, __USER_DS); |
| 2058 |
cpu_x86_load_seg(env, R_SS, __USER_DS); |
| 2059 |
cpu_x86_load_seg(env, R_FS, __USER_DS); |
| 2060 |
cpu_x86_load_seg(env, R_GS, __USER_DS); |
| 2061 |
|
| 2062 |
/* This hack makes Wine work... */
|
| 2063 |
env->segs[R_FS].selector = 0;
|
| 2064 |
#elif defined(TARGET_ARM)
|
| 2065 |
{
|
| 2066 |
int i;
|
| 2067 |
if (cpu_model == NULL) |
| 2068 |
cpu_model = "arm926";
|
| 2069 |
cpu_arm_set_model(env, cpu_model); |
| 2070 |
cpsr_write(env, regs->uregs[16], 0xffffffff); |
| 2071 |
for(i = 0; i < 16; i++) { |
| 2072 |
env->regs[i] = regs->uregs[i]; |
| 2073 |
} |
| 2074 |
} |
| 2075 |
#elif defined(TARGET_SPARC)
|
| 2076 |
{
|
| 2077 |
int i;
|
| 2078 |
const sparc_def_t *def;
|
| 2079 |
#ifdef TARGET_SPARC64
|
| 2080 |
if (cpu_model == NULL) |
| 2081 |
cpu_model = "TI UltraSparc II";
|
| 2082 |
#else
|
| 2083 |
if (cpu_model == NULL) |
| 2084 |
cpu_model = "Fujitsu MB86904";
|
| 2085 |
#endif
|
| 2086 |
sparc_find_by_name(cpu_model, &def); |
| 2087 |
if (def == NULL) { |
| 2088 |
fprintf(stderr, "Unable to find Sparc CPU definition\n");
|
| 2089 |
exit(1);
|
| 2090 |
} |
| 2091 |
cpu_sparc_register(env, def); |
| 2092 |
env->pc = regs->pc; |
| 2093 |
env->npc = regs->npc; |
| 2094 |
env->y = regs->y; |
| 2095 |
for(i = 0; i < 8; i++) |
| 2096 |
env->gregs[i] = regs->u_regs[i]; |
| 2097 |
for(i = 0; i < 8; i++) |
| 2098 |
env->regwptr[i] = regs->u_regs[i + 8];
|
| 2099 |
} |
| 2100 |
#elif defined(TARGET_PPC)
|
| 2101 |
{
|
| 2102 |
ppc_def_t *def; |
| 2103 |
int i;
|
| 2104 |
|
| 2105 |
/* Choose and initialise CPU */
|
| 2106 |
if (cpu_model == NULL) |
| 2107 |
cpu_model = "750";
|
| 2108 |
ppc_find_by_name(cpu_model, &def); |
| 2109 |
if (def == NULL) { |
| 2110 |
cpu_abort(env, |
| 2111 |
"Unable to find PowerPC CPU definition\n");
|
| 2112 |
} |
| 2113 |
cpu_ppc_register(env, def); |
| 2114 |
cpu_ppc_reset(env); |
| 2115 |
for (i = 0; i < 32; i++) { |
| 2116 |
if (i != 12 && i != 6 && i != 13) |
| 2117 |
env->msr[i] = (regs->msr >> i) & 1;
|
| 2118 |
} |
| 2119 |
#if defined(TARGET_PPC64)
|
| 2120 |
msr_sf = 1;
|
| 2121 |
#endif
|
| 2122 |
env->nip = regs->nip; |
| 2123 |
for(i = 0; i < 32; i++) { |
| 2124 |
env->gpr[i] = regs->gpr[i]; |
| 2125 |
} |
| 2126 |
} |
| 2127 |
#elif defined(TARGET_M68K)
|
| 2128 |
{
|
| 2129 |
if (cpu_model == NULL) |
| 2130 |
cpu_model = "any";
|
| 2131 |
if (cpu_m68k_set_model(env, cpu_model)) {
|
| 2132 |
cpu_abort(cpu_single_env, |
| 2133 |
"Unable to find m68k CPU definition\n");
|
| 2134 |
} |
| 2135 |
env->pc = regs->pc; |
| 2136 |
env->dregs[0] = regs->d0;
|
| 2137 |
env->dregs[1] = regs->d1;
|
| 2138 |
env->dregs[2] = regs->d2;
|
| 2139 |
env->dregs[3] = regs->d3;
|
| 2140 |
env->dregs[4] = regs->d4;
|
| 2141 |
env->dregs[5] = regs->d5;
|
| 2142 |
env->dregs[6] = regs->d6;
|
| 2143 |
env->dregs[7] = regs->d7;
|
| 2144 |
env->aregs[0] = regs->a0;
|
| 2145 |
env->aregs[1] = regs->a1;
|
| 2146 |
env->aregs[2] = regs->a2;
|
| 2147 |
env->aregs[3] = regs->a3;
|
| 2148 |
env->aregs[4] = regs->a4;
|
| 2149 |
env->aregs[5] = regs->a5;
|
| 2150 |
env->aregs[6] = regs->a6;
|
| 2151 |
env->aregs[7] = regs->usp;
|
| 2152 |
env->sr = regs->sr; |
| 2153 |
ts->sim_syscalls = 1;
|
| 2154 |
} |
| 2155 |
#elif defined(TARGET_MIPS)
|
| 2156 |
{
|
| 2157 |
mips_def_t *def; |
| 2158 |
int i;
|
| 2159 |
|
| 2160 |
/* Choose and initialise CPU */
|
| 2161 |
if (cpu_model == NULL) |
| 2162 |
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
| 2163 |
cpu_model = "20Kc";
|
| 2164 |
#else
|
| 2165 |
cpu_model = "24Kf";
|
| 2166 |
#endif
|
| 2167 |
mips_find_by_name(cpu_model, &def); |
| 2168 |
if (def == NULL) |
| 2169 |
cpu_abort(env, "Unable to find MIPS CPU definition\n");
|
| 2170 |
cpu_mips_register(env, def); |
| 2171 |
|
| 2172 |
for(i = 0; i < 32; i++) { |
| 2173 |
env->gpr[i][env->current_tc] = regs->regs[i]; |
| 2174 |
} |
| 2175 |
env->PC[env->current_tc] = regs->cp0_epc; |
| 2176 |
} |
| 2177 |
#elif defined(TARGET_SH4)
|
| 2178 |
{
|
| 2179 |
int i;
|
| 2180 |
|
| 2181 |
for(i = 0; i < 16; i++) { |
| 2182 |
env->gregs[i] = regs->regs[i]; |
| 2183 |
} |
| 2184 |
env->pc = regs->pc; |
| 2185 |
} |
| 2186 |
#elif defined(TARGET_ALPHA)
|
| 2187 |
{
|
| 2188 |
int i;
|
| 2189 |
|
| 2190 |
for(i = 0; i < 28; i++) { |
| 2191 |
env->ir[i] = ((target_ulong *)regs)[i]; |
| 2192 |
} |
| 2193 |
env->ipr[IPR_USP] = regs->usp; |
| 2194 |
env->ir[30] = regs->usp;
|
| 2195 |
env->pc = regs->pc; |
| 2196 |
env->unique = regs->unique; |
| 2197 |
} |
| 2198 |
#else
|
| 2199 |
#error unsupported target CPU
|
| 2200 |
#endif
|
| 2201 |
|
| 2202 |
#if defined(TARGET_ARM) || defined(TARGET_M68K)
|
| 2203 |
ts->stack_base = info->start_stack; |
| 2204 |
ts->heap_base = info->brk; |
| 2205 |
/* This will be filled in on the first SYS_HEAPINFO call. */
|
| 2206 |
ts->heap_limit = 0;
|
| 2207 |
#endif
|
| 2208 |
|
| 2209 |
if (gdbstub_port) {
|
| 2210 |
gdbserver_start (gdbstub_port); |
| 2211 |
gdb_handlesig(env, 0);
|
| 2212 |
} |
| 2213 |
cpu_loop(env); |
| 2214 |
/* never exits */
|
| 2215 |
return 0; |
| 2216 |
} |