Revision 3e1dbc3b
b/hw/mst_fpga.c | ||
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50 | 50 |
mst_fpga_set_irq(void *opaque, int irq, int level) |
51 | 51 |
{ |
52 | 52 |
mst_irq_state *s = (mst_irq_state *)opaque; |
53 |
uint32_t oldint = s->intsetclr; |
|
53 |
uint32_t oldint = s->intsetclr & s->intmskena;
|
|
54 | 54 |
|
55 | 55 |
if (level) |
56 | 56 |
s->prev_level |= 1u << irq; |
... | ... | |
139 | 139 |
break; |
140 | 140 |
case MST_INTSETCLR: /* clear or set interrupt */ |
141 | 141 |
s->intsetclr = (value & 0xFEEFF); |
142 |
qemu_set_irq(s->parent, s->intsetclr); |
|
142 |
qemu_set_irq(s->parent, s->intsetclr & s->intmskena);
|
|
143 | 143 |
break; |
144 | 144 |
case MST_PCMCIA0: |
145 | 145 |
s->pcmcia0 = value; |
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