Revision 3f582262 hw/pxa.h
| b/hw/pxa.h | ||
|---|---|---|
| 65 | 65 |
qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env); |
| 66 | 66 |
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| 67 | 67 |
/* pxa2xx_timer.c */ |
| 68 |
void pxa25x_timer_init(target_phys_addr_t base, |
|
| 69 |
qemu_irq *irqs, CPUState *cpustate); |
|
| 70 |
void pxa27x_timer_init(target_phys_addr_t base, |
|
| 71 |
qemu_irq *irqs, qemu_irq irq4, CPUState *cpustate); |
|
| 68 |
void pxa25x_timer_init(target_phys_addr_t base, qemu_irq *irqs); |
|
| 69 |
void pxa27x_timer_init(target_phys_addr_t base, qemu_irq *irqs, qemu_irq irq4); |
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| 72 | 70 |
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| 73 | 71 |
/* pxa2xx_gpio.c */ |
| 74 | 72 |
struct pxa2xx_gpio_info_s; |
| ... | ... | |
| 117 | 115 |
uint32_t (*readfn)(void *opaque), |
| 118 | 116 |
void (*writefn)(void *opaque, uint32_t value), void *opaque); |
| 119 | 117 |
|
| 118 |
struct pxa2xx_i2c_s; |
|
| 119 |
struct pxa2xx_i2c_s *pxa2xx_i2c_init(target_phys_addr_t base, |
|
| 120 |
qemu_irq irq, int ioregister); |
|
| 121 |
i2c_bus *pxa2xx_i2c_bus(struct pxa2xx_i2c_s *s); |
|
| 122 |
|
|
| 120 | 123 |
struct pxa2xx_i2s_s; |
| 121 | 124 |
struct pxa2xx_fir_s; |
| 122 | 125 |
|
| ... | ... | |
| 127 | 130 |
struct pxa2xx_gpio_info_s *gpio; |
| 128 | 131 |
struct pxa2xx_lcdc_s *lcd; |
| 129 | 132 |
struct pxa2xx_ssp_s **ssp; |
| 133 |
struct pxa2xx_i2c_s *i2c[2]; |
|
| 130 | 134 |
struct pxa2xx_mmci_s *mmc; |
| 131 | 135 |
struct pxa2xx_pcmcia_s *pcmcia[2]; |
| 132 | 136 |
struct pxa2xx_i2s_s *i2s; |
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