Revision 3fc6c082 target-ppc/op.c
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/* |
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* PPC emulation micro-operations for qemu. |
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* PowerPC emulation micro-operations for qemu.
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* |
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* Copyright (c) 2003 Jocelyn Mayer |
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* Copyright (c) 2003-2005 Jocelyn Mayer
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* |
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* This library is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
| ... | ... | |
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#define REG 31 |
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#include "op_template.h" |
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/* PPC state maintenance operations */ |
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/* PowerPC state maintenance operations */
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/* set_Rc0 */ |
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PPC_OP(set_Rc0) |
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{
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| ... | ... | |
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|
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PPC_OP(store_srin) |
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{
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do_store_sr(T1 >> 28);
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do_store_sr(env, ((uint32_t)T1 >> 28), T0);
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RETURN(); |
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} |
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|
| ... | ... | |
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|
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PPC_OP(store_sdr1) |
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{
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regs->sdr1 = T0;
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do_store_sdr1(env, T0);
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RETURN(); |
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} |
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|
| ... | ... | |
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/* Load/store special registers */ |
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PPC_OP(load_cr) |
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{
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do_load_cr();
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T0 = do_load_cr(env);
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RETURN(); |
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} |
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PPC_OP(store_cr) |
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{
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do_store_cr(PARAM(1)); |
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do_store_cr(env, T0, PARAM(1));
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RETURN(); |
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} |
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|
| ... | ... | |
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|
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PPC_OP(load_xer) |
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{
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do_load_xer();
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T0 = do_load_xer(env);
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RETURN(); |
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} |
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|
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PPC_OP(store_xer) |
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{
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do_store_xer(); |
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do_store_xer(env, T0);
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RETURN(); |
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} |
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|
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PPC_OP(load_msr) |
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{
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do_load_msr();
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T0 = do_load_msr(env);
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RETURN(); |
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} |
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|
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PPC_OP(store_msr) |
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{
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do_store_msr(); |
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do_store_msr(env, T0);
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RETURN(); |
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} |
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|
| ... | ... | |
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T0 = regs->IBAT[PARAM(1)][PARAM(2)]; |
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} |
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PPC_OP(store_ibat)
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void op_store_ibatu (void)
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{
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do_store_ibat(PARAM(1), PARAM(2)); |
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do_store_ibatu(env, PARAM1, T0); |
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RETURN(); |
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} |
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void op_store_ibatl (void) |
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{
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#if 1 |
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env->IBAT[1][PARAM1] = T0; |
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#else |
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do_store_ibatl(env, PARAM1, T0); |
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#endif |
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RETURN(); |
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} |
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PPC_OP(load_dbat) |
| ... | ... | |
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T0 = regs->DBAT[PARAM(1)][PARAM(2)]; |
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} |
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PPC_OP(store_dbat) |
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void op_store_dbatu (void) |
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{
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do_store_dbatu(env, PARAM1, T0); |
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RETURN(); |
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} |
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void op_store_dbatl (void) |
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{
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do_store_dbat(PARAM(1), PARAM(2)); |
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#if 1 |
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env->DBAT[1][PARAM1] = T0; |
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#else |
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do_store_dbatl(env, PARAM1, T0); |
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#endif |
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RETURN(); |
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} |
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/* FPSCR */ |
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PPC_OP(load_fpscr) |
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{
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do_load_fpscr();
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FT0 = do_load_fpscr(env);
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RETURN(); |
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} |
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PPC_OP(store_fpscr) |
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{
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do_store_fpscr(PARAM(1));
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do_store_fpscr(env, FT0, PARAM1);
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RETURN(); |
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} |
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|
| ... | ... | |
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/* Return from interrupt */ |
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PPC_OP(rfi) |
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{
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regs->nip = regs->spr[SRR0] & ~0x00000003; |
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regs->nip = regs->spr[SPR_SRR0] & ~0x00000003;
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#if 1 // TRY |
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T0 = regs->spr[SRR1] & ~0xFFF00000; |
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T0 = regs->spr[SPR_SRR1] & ~0xFFF00000;
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#else |
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T0 = regs->spr[SRR1] & ~0xFFFF0000; |
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#endif |
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do_store_msr(); |
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#if defined (DEBUG_OP) |
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dump_rfi(); |
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T0 = regs->spr[SPR_SRR1] & ~0xFFFF0000; |
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#endif |
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// do_tlbia();
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do_store_msr(env, T0);
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do_raise_exception(EXCP_RFI); |
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RETURN(); |
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} |
| ... | ... | |
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do_tlbie(); |
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RETURN(); |
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} |
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void op_store_pir (void) |
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{
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env->spr[SPR_PIR] = T0 & 0x0000000FUL; |
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RETURN(); |
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} |
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