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LICENSE 146 Bytes
README 13.6 kB
TODO 403 Bytes
tcg-op.h 65.3 kB
tcg-opc.h 8.4 kB
tcg-runtime.h 473 Bytes
tcg.c 61.9 kB
tcg.h 14.1 kB

Latest revisions

# Date Author Comment
a38e609c 02/06/2010 06:14 pm Richard Henderson

tcg: document double-word support opcodes.

The internal opcodes brcond2, add2, sub2, mulu2 were undocumented.
Place these in a new section that clearly indicates that they are
not to be emitted by translators.

Signed-off-by: Richard Henderson <>...
be210acb 02/06/2010 06:14 pm Richard Henderson

tcg: generic support for conditional set

Defines setcond_{i32,i64} and setcond2_i32 for 64-on-32-bit.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
401d466d 02/06/2010 06:14 pm Richard Henderson

tcg: add tcg_invert_cond

It is very handy to have a reliable mapping of a condition to its inverse.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
09aac126 01/15/2010 08:32 am Richard Henderson

tcg/x86_64: Avoid unnecessary REX.B prefixes.

The existing P_REXB internal opcode flag unconditionally emits
the REX prefix. Technically it's not needed if the register in
question is %al, %bl, %cl, %dl.

Eliding the prefix requires splitting the P_REXB flag into two,...
57169903 01/14/2010 07:16 pm Richard Henderson

tcg/x86_64: Special-case all 32-bit AND operands.

This avoids an unnecessary REX.W prefix when dealing with AND
operands that fit into a 32-bit quantity. The most common change
actually seen is movz[wb]q -> movz[wb]l.

Similarly, avoid REXW in ext{8,16}u_i64 tcg opcodes....
cc6dfecf 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement ext32[su]_i64

The 32-bit right-shift instructions is defined to extend the shifted
output to 64-bits. A shift count of zero therefore is a simple
extension without actually shifting.

Signed-off-by: Richard Henderson <>...
583d1215 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement division properly.

The {div,divu}2 opcodes are intended for systems for which the
division instruction produces both quotient and remainder. Sparc
is not such a system. Indeed, the remainder must be computed as

quot = a / b
  rem = a - (quot * b)...
5e143c43 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Do not remove %o012 from 'r' constraint.

Only 'L' constraint needs that.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
7a3766f3 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement add2, sub2, mulu2.

Add missing 32-bit double-word support opcodes.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
ba225198 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Add tcg_out_arithc.

Add a function to handle the register-vs-immediate test for arithmetic.

Also, adjust the OP_32_64 macro so that it auto-indents properly.
Rename the gen_arith32 label to gen_arith, since it handles 64-bit
arithmetic as well....

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