Revision 406f82e8 target-sparc/translate.c
| b/target-sparc/translate.c | ||
|---|---|---|
| 3511 | 3511 |
}, |
| 3512 | 3512 |
#else |
| 3513 | 3513 |
{
|
| 3514 |
.name = "Fujitsu MB86900", |
|
| 3515 |
.iu_version = 0x00 << 24, /* Impl 0, ver 0 */ |
|
| 3516 |
.fpu_version = 4 << 17, /* FPU version 4 (Meiko) */ |
|
| 3517 |
.mmu_version = 0x00 << 24, /* Impl 0, ver 0 */ |
|
| 3518 |
.mmu_bm = 0x00004000, |
|
| 3519 |
}, |
|
| 3520 |
{
|
|
| 3514 | 3521 |
.name = "Fujitsu MB86904", |
| 3515 | 3522 |
.iu_version = 0x04 << 24, /* Impl 0, ver 4 */ |
| 3516 | 3523 |
.fpu_version = 4 << 17, /* FPU version 4 (Meiko) */ |
| ... | ... | |
| 3525 | 3532 |
.mmu_bm = 0x00004000, |
| 3526 | 3533 |
}, |
| 3527 | 3534 |
{
|
| 3535 |
.name = "LSI L64811", |
|
| 3536 |
.iu_version = 0x10 << 24, /* Impl 1, ver 0 */ |
|
| 3537 |
.fpu_version = 1 << 17, /* FPU version 1 (LSI L64814) */ |
|
| 3538 |
.mmu_version = 0x10 << 24, |
|
| 3539 |
.mmu_bm = 0x00004000, |
|
| 3540 |
}, |
|
| 3541 |
{
|
|
| 3542 |
.name = "Cypress CY7C601", |
|
| 3543 |
.iu_version = 0x11 << 24, /* Impl 1, ver 1 */ |
|
| 3544 |
.fpu_version = 3 << 17, /* FPU version 3 (Cypress CY7C602) */ |
|
| 3545 |
.mmu_version = 0x10 << 24, |
|
| 3546 |
.mmu_bm = 0x00004000, |
|
| 3547 |
}, |
|
| 3548 |
{
|
|
| 3549 |
.name = "Cypress CY7C611", |
|
| 3550 |
.iu_version = 0x13 << 24, /* Impl 1, ver 3 */ |
|
| 3551 |
.fpu_version = 3 << 17, /* FPU version 3 (Cypress CY7C602) */ |
|
| 3552 |
.mmu_version = 0x10 << 24, |
|
| 3553 |
.mmu_bm = 0x00004000, |
|
| 3554 |
}, |
|
| 3555 |
{
|
|
| 3556 |
.name = "TI SuperSparc II", |
|
| 3557 |
.iu_version = 0x40000000, |
|
| 3558 |
.fpu_version = 0 << 17, |
|
| 3559 |
.mmu_version = 0x04000000, |
|
| 3560 |
.mmu_bm = 0x00002000, |
|
| 3561 |
}, |
|
| 3562 |
{
|
|
| 3528 | 3563 |
.name = "TI MicroSparc I", |
| 3529 | 3564 |
.iu_version = 0x41000000, |
| 3530 | 3565 |
.fpu_version = 4 << 17, |
| ... | ... | |
| 3532 | 3567 |
.mmu_bm = 0x00004000, |
| 3533 | 3568 |
}, |
| 3534 | 3569 |
{
|
| 3535 |
.name = "TI SuperSparc II", |
|
| 3536 |
.iu_version = 0x40000000, |
|
| 3570 |
.name = "TI MicroSparc II", |
|
| 3571 |
.iu_version = 0x42000000, |
|
| 3572 |
.fpu_version = 4 << 17, |
|
| 3573 |
.mmu_version = 0x02000000, |
|
| 3574 |
.mmu_bm = 0x00004000, |
|
| 3575 |
}, |
|
| 3576 |
{
|
|
| 3577 |
.name = "TI MicroSparc IIep", |
|
| 3578 |
.iu_version = 0x42000000, |
|
| 3579 |
.fpu_version = 4 << 17, |
|
| 3580 |
.mmu_version = 0x04000000, |
|
| 3581 |
.mmu_bm = 0x00004000, |
|
| 3582 |
}, |
|
| 3583 |
{
|
|
| 3584 |
.name = "TI SuperSparc 51", |
|
| 3585 |
.iu_version = 0x43000000, |
|
| 3537 | 3586 |
.fpu_version = 0 << 17, |
| 3538 | 3587 |
.mmu_version = 0x04000000, |
| 3539 | 3588 |
.mmu_bm = 0x00002000, |
| 3540 | 3589 |
}, |
| 3541 | 3590 |
{
|
| 3542 |
.name = "Ross RT620", |
|
| 3591 |
.name = "TI SuperSparc 61", |
|
| 3592 |
.iu_version = 0x44000000, |
|
| 3593 |
.fpu_version = 0 << 17, |
|
| 3594 |
.mmu_version = 0x04000000, |
|
| 3595 |
.mmu_bm = 0x00002000, |
|
| 3596 |
}, |
|
| 3597 |
{
|
|
| 3598 |
.name = "Ross RT625", |
|
| 3543 | 3599 |
.iu_version = 0x1e000000, |
| 3544 | 3600 |
.fpu_version = 1 << 17, |
| 3545 |
.mmu_version = 0x17000000, |
|
| 3601 |
.mmu_version = 0x1e000000, |
|
| 3602 |
.mmu_bm = 0x00004000, |
|
| 3603 |
}, |
|
| 3604 |
{
|
|
| 3605 |
.name = "Ross RT620", |
|
| 3606 |
.iu_version = 0x1f000000, |
|
| 3607 |
.fpu_version = 1 << 17, |
|
| 3608 |
.mmu_version = 0x1f000000, |
|
| 3609 |
.mmu_bm = 0x00004000, |
|
| 3610 |
}, |
|
| 3611 |
{
|
|
| 3612 |
.name = "BIT B5010", |
|
| 3613 |
.iu_version = 0x20000000, |
|
| 3614 |
.fpu_version = 0 << 17, /* B5010/B5110/B5120/B5210 */ |
|
| 3615 |
.mmu_version = 0x20000000, |
|
| 3616 |
.mmu_bm = 0x00004000, |
|
| 3617 |
}, |
|
| 3618 |
{
|
|
| 3619 |
.name = "Matsushita MN10501", |
|
| 3620 |
.iu_version = 0x50000000, |
|
| 3621 |
.fpu_version = 0 << 17, |
|
| 3622 |
.mmu_version = 0x50000000, |
|
| 3623 |
.mmu_bm = 0x00004000, |
|
| 3624 |
}, |
|
| 3625 |
{
|
|
| 3626 |
.name = "Weitek W8601", |
|
| 3627 |
.iu_version = 0x90 << 24, /* Impl 9, ver 0 */ |
|
| 3628 |
.fpu_version = 3 << 17, /* FPU version 3 (Weitek WTL3170/2) */ |
|
| 3629 |
.mmu_version = 0x10 << 24, |
|
| 3630 |
.mmu_bm = 0x00004000, |
|
| 3631 |
}, |
|
| 3632 |
{
|
|
| 3633 |
.name = "LEON2", |
|
| 3634 |
.iu_version = 0xf2000000, |
|
| 3635 |
.fpu_version = 4 << 17, /* FPU version 4 (Meiko) */ |
|
| 3636 |
.mmu_version = 0xf2000000, |
|
| 3637 |
.mmu_bm = 0x00004000, |
|
| 3638 |
}, |
|
| 3639 |
{
|
|
| 3640 |
.name = "LEON3", |
|
| 3641 |
.iu_version = 0xf3000000, |
|
| 3642 |
.fpu_version = 4 << 17, /* FPU version 4 (Meiko) */ |
|
| 3643 |
.mmu_version = 0xf3000000, |
|
| 3546 | 3644 |
.mmu_bm = 0x00004000, |
| 3547 | 3645 |
}, |
| 3548 | 3646 |
#endif |
Also available in: Unified diff