Revision 40905a6a hw/armv7m.c

b/hw/armv7m.c
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   bitband_writel
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};
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static void armv7m_bitband_init(void)
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typedef struct {
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    SysBusDevice busdev;
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    uint32_t base;
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} BitBandState;
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static void bitband_init(SysBusDevice *dev)
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{
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    BitBandState *s = FROM_SYSBUS(BitBandState, dev);
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    int iomemtype;
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    static uint32_t bitband1_offset = 0x20000000;
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    static uint32_t bitband2_offset = 0x40000000;
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    s->base = qdev_get_prop_int(&dev->qdev, "base", 0);
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    iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,
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                                       &bitband1_offset);
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    cpu_register_physical_memory(0x22000000, 0x02000000, iomemtype);
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    iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,
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                                       &bitband2_offset);
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    cpu_register_physical_memory(0x42000000, 0x02000000, iomemtype);
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                                       &s->base);
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    sysbus_init_mmio(dev, 0x02000000, iomemtype);
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}
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static void armv7m_bitband_init(void)
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{
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    DeviceState *dev;
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    dev = qdev_create(NULL, "ARM,bitband-memory");
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    qdev_set_prop_int(dev, "base", 0x20000000);
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    qdev_init(dev);
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    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
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    dev = qdev_create(NULL, "ARM,bitband-memory");
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    qdev_set_prop_int(dev, "base", 0x40000000);
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    qdev_init(dev);
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    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
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}
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/* Board init.  */
......
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    return pic;
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}
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static void armv7m_register_devices(void)
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{
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    sysbus_register_dev("ARM,bitband-memory", sizeof(BitBandState),
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                        bitband_init);
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}
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device_init(armv7m_register_devices)

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