Revision 40ce0a9a
| b/cpu-exec.c | ||
|---|---|---|
| 181 | 181 |
flags = (((env->pstate & PS_PEF) >> 1) | ((env->fprs & FPRS_FEF) << 2)) |
| 182 | 182 |
| (env->pstate & PS_PRIV) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2); |
| 183 | 183 |
#else |
| 184 |
// FPU enable . MMU enabled . MMU no-fault . Supervisor |
|
| 185 |
flags = (env->psref << 3) | ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1) |
|
| 184 |
// FPU enable . MMU Boot . MMU enabled . MMU no-fault . Supervisor |
|
| 185 |
flags = (env->psref << 4) | (((env->mmuregs[0] & MMU_BM) >> 14) << 3) |
|
| 186 |
| ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1) |
|
| 186 | 187 |
| env->psrs; |
| 187 | 188 |
#endif |
| 188 | 189 |
cs_base = env->npc; |
| b/hw/sun4m.c | ||
|---|---|---|
| 50 | 50 |
#define CMDLINE_ADDR 0x007ff000 |
| 51 | 51 |
#define INITRD_LOAD_ADDR 0x00800000 |
| 52 | 52 |
#define PROM_SIZE_MAX (256 * 1024) |
| 53 |
#define PROM_ADDR 0xffd00000 |
|
| 53 |
#define PROM_PADDR 0xff0000000ULL |
|
| 54 |
#define PROM_VADDR 0xffd00000 |
|
| 54 | 55 |
#define PROM_FILENAME "openbios-sparc32" |
| 55 | 56 |
|
| 56 | 57 |
#define MAX_CPUS 16 |
| ... | ... | |
| 425 | 426 |
linux_boot = (kernel_filename != NULL); |
| 426 | 427 |
|
| 427 | 428 |
prom_offset = RAM_size + vram_size; |
| 428 |
cpu_register_physical_memory(PROM_ADDR, |
|
| 429 |
cpu_register_physical_memory(PROM_PADDR,
|
|
| 429 | 430 |
(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK, |
| 430 | 431 |
prom_offset | IO_MEM_ROM); |
| 431 | 432 |
|
| 432 | 433 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME); |
| 433 |
ret = load_elf(buf, 0, NULL, NULL, NULL);
|
|
| 434 |
ret = load_elf(buf, PROM_PADDR - PROM_VADDR, NULL, NULL, NULL);
|
|
| 434 | 435 |
if (ret < 0) {
|
| 435 | 436 |
fprintf(stderr, "qemu: could not load prom '%s'\n", |
| 436 | 437 |
buf); |
| ... | ... | |
| 588 | 589 |
cpu_model = "TI SuperSparc II"; |
| 589 | 590 |
sun4m_common_init(RAM_size, boot_device, ds, kernel_filename, |
| 590 | 591 |
kernel_cmdline, initrd_filename, cpu_model, |
| 591 |
1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok
|
|
| 592 |
1, 0xffffffff); // XXX actually first 62GB ok
|
|
| 592 | 593 |
} |
| 593 | 594 |
|
| 594 | 595 |
QEMUMachine ss5_machine = {
|
| b/target-sparc/cpu.h | ||
|---|---|---|
| 145 | 145 |
/* MMU */ |
| 146 | 146 |
#define MMU_E (1<<0) |
| 147 | 147 |
#define MMU_NF (1<<1) |
| 148 |
#define MMU_BM (1<<14) |
|
| 148 | 149 |
|
| 149 | 150 |
#define PTE_ENTRYTYPE_MASK 3 |
| 150 | 151 |
#define PTE_ACCESS_MASK 0x1c |
| b/target-sparc/helper.c | ||
|---|---|---|
| 110 | 110 |
unsigned long page_offset; |
| 111 | 111 |
|
| 112 | 112 |
virt_addr = address & TARGET_PAGE_MASK; |
| 113 |
|
|
| 113 | 114 |
if ((env->mmuregs[0] & MMU_E) == 0) { /* MMU disabled */
|
| 115 |
// Boot mode: instruction fetches are taken from PROM |
|
| 116 |
if (rw == 2 && (env->mmuregs[0] & MMU_BM)) {
|
|
| 117 |
*physical = 0xff0000000ULL | (address & 0x3ffffULL); |
|
| 118 |
*prot = PAGE_READ | PAGE_EXEC; |
|
| 119 |
return 0; |
|
| 120 |
} |
|
| 114 | 121 |
*physical = address; |
| 115 | 122 |
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |
| 116 | 123 |
return 0; |
| b/target-sparc/op_helper.c | ||
|---|---|---|
| 337 | 337 |
oldreg = env->mmuregs[reg]; |
| 338 | 338 |
switch(reg) {
|
| 339 | 339 |
case 0: |
| 340 |
env->mmuregs[reg] &= ~(MMU_E | MMU_NF); |
|
| 341 |
env->mmuregs[reg] |= T1 & (MMU_E | MMU_NF); |
|
| 340 |
env->mmuregs[reg] &= ~(MMU_E | MMU_NF | MMU_BM);
|
|
| 341 |
env->mmuregs[reg] |= T1 & (MMU_E | MMU_NF | MMU_BM);
|
|
| 342 | 342 |
// Mappings generated during no-fault mode or MMU |
| 343 | 343 |
// disabled mode are invalid in normal mode |
| 344 | 344 |
if (oldreg != env->mmuregs[reg]) |
| b/target-sparc/translate.c | ||
|---|---|---|
| 3486 | 3486 |
env->pstate = PS_PRIV; |
| 3487 | 3487 |
env->pc = 0x1fff0000000ULL; |
| 3488 | 3488 |
#else |
| 3489 |
env->pc = 0xffd00000;
|
|
| 3489 |
env->pc = 0; |
|
| 3490 | 3490 |
env->mmuregs[0] &= ~(MMU_E | MMU_NF); |
| 3491 |
env->mmuregs[0] |= MMU_BM; |
|
| 3491 | 3492 |
#endif |
| 3492 | 3493 |
env->npc = env->pc + 4; |
| 3493 | 3494 |
#endif |
| ... | ... | |
| 3584 | 3585 |
env->version = def->iu_version; |
| 3585 | 3586 |
env->fsr = def->fpu_version; |
| 3586 | 3587 |
#if !defined(TARGET_SPARC64) |
| 3587 |
env->mmuregs[0] = def->mmu_version; |
|
| 3588 |
env->mmuregs[0] |= def->mmu_version;
|
|
| 3588 | 3589 |
#endif |
| 3589 | 3590 |
return 0; |
| 3590 | 3591 |
} |
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