Archipelago » qemu

{

    TranslationBlock *tb, **ptb1;

    unsigned int h;

    tb_invalidated_flag = 0;

    /* find translated block using physical mappings */

    phys_page1 = phys_pc & TARGET_PAGE_MASK;

    phys_page2 = -1;

    h = tb_phys_hash_func(phys_pc);

            if (tb->page_addr[1] != -1) {

                virt_page2 = (pc & TARGET_PAGE_MASK) +

                    TARGET_PAGE_SIZE;

                if (tb->page_addr[1] == phys_page2)

                    goto found;

            } else {

/* allow to see translation results - the slowdown should be negligible, so we leave it */

#define DEBUG_DISAS

/* is_jmp field values */

#define DISAS_NEXT    0 /* next instruction can be analyzed */

#define DISAS_JUMP    1 /* only pc was modified dynamically */

void cpu_exec_init(CPUState *env);

void QEMU_NORETURN cpu_loop_exit(void);

int page_unprotect(target_ulong address, unsigned long pc, void *puc);

                                   int is_cpu_write_access);

void tb_invalidate_page_range(target_ulong start, target_ulong end);

void tlb_flush_page(CPUState *env, target_ulong addr);

    /* first and second physical page containing code. The lower bit

       of the pointer tells the index in page_next[] */

    struct TranslationBlock *page_next[2];

    /* the following data are used to directly call another TB from

       the code of this one. */

	    | (tmp & TB_JMP_ADDR_MASK));

}

{

    return pc & (CODE_GEN_PHYS_HASH_SIZE - 1);

}

TranslationBlock *tb_alloc(target_ulong pc);

void tb_free(TranslationBlock *tb);

void tb_flush(CPUState *env);

extern TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];

extern uint8_t *code_gen_ptr;

#endif

#if defined(CONFIG_USER_ONLY)

{

    return addr;

}

/* NOTE: this function can trigger an exception */

/* NOTE2: the returned address is not exactly the physical address: it

   is the offset relative to phys_ram_base */

{

    int mmu_idx, page_index, pd;

    void *p;

#endif

} PageDesc;

   while in user mode we want it to be based on virtual addresses.  */

#if !defined(CONFIG_USER_ONLY)

# define L1_MAP_ADDR_SPACE_BITS  TARGET_PHYS_ADDR_SPACE_BITS

#else

# define L1_MAP_ADDR_SPACE_BITS  TARGET_VIRT_ADDR_SPACE_BITS

#endif

static void *l1_map[V_L1_SIZE];

#if !defined(CONFIG_USER_ONLY)

/* This is a multi-level map on the physical address space.

   The bottom level has pointers to PhysPageDesc.  */

static void *l1_phys_map[P_L1_SIZE];

#endif

}

{

#if defined(CONFIG_USER_ONLY)

    /* We can't use qemu_malloc because it may recurse into a locked mutex.

       Neither can we record the new pages we reserve while allocating a

    do { P = qemu_mallocz(SIZE); } while (0)

#endif

    /* Level 1.  Always allocated.  */

    lp = l1_map + ((index >> V_L1_SHIFT) & (V_L1_SIZE - 1));

    return pd + (index & (L2_SIZE - 1));

}

{

    return page_find_alloc(index, 0);

}

    tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));

}

{

    CPUState *env;

    PageDesc *p;

    unsigned int h, n1;

    TranslationBlock *tb1, *tb2;

    /* remove the TB from the hash list */

{

    TranslationBlock *tb;

    uint8_t *tc_ptr;

    int code_gen_size;

    tb = tb_alloc(pc);

    if (!tb) {

        /* flush must be done */

    virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;

    phys_page2 = -1;

    if ((pc & TARGET_PAGE_MASK) != virt_page2) {

    }

    return tb;

}

   the same physical page. 'is_cpu_write_access' should be true if called

   from a real cpu write access: the virtual CPU will exit the current

   TB if code is modified inside this TB. */

                                   int is_cpu_write_access)

{

    TranslationBlock *tb, *tb_next, *saved_tb;

    CPUState *env = cpu_single_env;

    PageDesc *p;

    int n;

#ifdef TARGET_HAS_PRECISE_SMC

}

/* len must be <= 8 and start must be a multiple of len */

{

    PageDesc *p;

    int offset, b;

}

#if !defined(CONFIG_SOFTMMU)

                                    unsigned long pc, void *puc)

{

    TranslationBlock *tb;

/* add the tb in the target page and protect it if necessary */

static inline void tb_alloc_page(TranslationBlock *tb,

{

    PageDesc *p;

    TranslationBlock *last_first_tb;

/* add a new TB and link it to the physical page tables. phys_page2 is

   (-1) to indicate that only one page contains the TB. */

{

    unsigned int h;

    TranslationBlock **ptb;