Revision 426f17bb

b/hw/grackle_pci.c
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "sysbus.h"
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#include "ppc_mac.h"
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#include "pci.h"
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......
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typedef target_phys_addr_t pci_addr_t;
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#include "pci_host.h"
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typedef PCIHostState GrackleState;
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typedef struct GrackleState {
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    SysBusDevice busdev;
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    PCIHostState host_state;
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} GrackleState;
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static void pci_grackle_config_writel (void *opaque, target_phys_addr_t addr,
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                                       uint32_t val)
......
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#ifdef TARGET_WORDS_BIGENDIAN
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    val = bswap32(val);
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#endif
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    s->config_reg = val;
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    s->host_state.config_reg = val;
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}
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static uint32_t pci_grackle_config_readl (void *opaque, target_phys_addr_t addr)
......
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    GrackleState *s = opaque;
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    uint32_t val;
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    val = s->config_reg;
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    val = s->host_state.config_reg;
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#ifdef TARGET_WORDS_BIGENDIAN
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    val = bswap32(val);
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#endif
......
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
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{
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    DeviceState *dev;
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    SysBusDevice *s;
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    GrackleState *d;
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    dev = qdev_create(NULL, "grackle");
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    qdev_init(dev);
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    s = sysbus_from_qdev(dev);
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    d = FROM_SYSBUS(GrackleState, s);
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    d->host_state.bus = pci_register_bus(NULL, "pci",
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                                         pci_grackle_set_irq,
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                                         pci_grackle_map_irq,
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                                         pic, 0, 4);
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    pci_create_simple(d->host_state.bus, 0, "grackle");
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    sysbus_mmio_map(s, 0, base);
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    sysbus_mmio_map(s, 1, base + 0x00200000);
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    return d->host_state.bus;
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}
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static void pci_grackle_init_device(SysBusDevice *dev)
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{
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    GrackleState *s;
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    int pci_mem_config, pci_mem_data;
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    s = FROM_SYSBUS(GrackleState, dev);
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    pci_mem_config = cpu_register_io_memory(pci_grackle_config_read,
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                                            pci_grackle_config_write, s);
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    pci_mem_data = cpu_register_io_memory(pci_grackle_read,
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                                          pci_grackle_write,
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                                          &s->host_state);
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    sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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    sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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    register_savevm("grackle", 0, 1, pci_grackle_save, pci_grackle_load,
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                    &s->host_state);
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    qemu_register_reset(pci_grackle_reset, &s->host_state);
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    pci_grackle_reset(&s->host_state);
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}
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static void pci_dec_21154_init_device(SysBusDevice *dev)
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{
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    GrackleState *s;
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    PCIDevice *d;
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    int pci_mem_config, pci_mem_data;
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    s = qemu_mallocz(sizeof(GrackleState));
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    s->bus = pci_register_bus(NULL, "pci",
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                              pci_grackle_set_irq, pci_grackle_map_irq,
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                              pic, 0, 4);
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    s = FROM_SYSBUS(GrackleState, dev);
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    pci_mem_config = cpu_register_io_memory(pci_grackle_config_read,
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                                            pci_grackle_config_write, s);
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    pci_mem_data = cpu_register_io_memory(pci_grackle_read,
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                                          pci_grackle_write, s);
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    cpu_register_physical_memory(base, 0x1000, pci_mem_config);
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    cpu_register_physical_memory(base + 0x00200000, 0x1000, pci_mem_data);
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    d = pci_register_device(s->bus, "Grackle host bridge", sizeof(PCIDevice),
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                            0, NULL, NULL);
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                                          pci_grackle_write,
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                                          &s->host_state);
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    sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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    sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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}
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static void grackle_pci_host_init(PCIDevice *d)
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{
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    pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA);
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    pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106);
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    d->config[0x08] = 0x00; // revision
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    d->config[0x09] = 0x01;
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    pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
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    d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
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}
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#if 0
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static void dec_21154_pci_host_init(PCIDevice *d)
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{
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    /* PCI2PCI bridge same values as PearPC - check this */
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    pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
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    pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
......
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    d->config[0x25] = 0x84;
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    d->config[0x26] = 0x00; // prefetchable_memory_limit
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    d->config[0x27] = 0x85;
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#endif
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    register_savevm("grackle", 0, 1, pci_grackle_save, pci_grackle_load, d);
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    qemu_register_reset(pci_grackle_reset, d);
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    pci_grackle_reset(d);
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}
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static PCIDeviceInfo grackle_pci_host_info = {
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    .qdev.name = "grackle",
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    .qdev.size = sizeof(PCIDevice),
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    .init      = grackle_pci_host_init,
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};
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    return s->bus;
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static PCIDeviceInfo dec_21154_pci_host_info = {
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    .qdev.name = "DEC 21154",
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    .qdev.size = sizeof(PCIDevice),
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    .init      = dec_21154_pci_host_init,
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};
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static void grackle_register_devices(void)
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{
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    sysbus_register_dev("grackle", sizeof(GrackleState),
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                        pci_grackle_init_device);
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    pci_qdev_register(&grackle_pci_host_info);
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    sysbus_register_dev("DEC 21154", sizeof(GrackleState),
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                        pci_dec_21154_init_device);
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    pci_qdev_register(&dec_21154_pci_host_info);
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}
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device_init(grackle_register_devices)

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