Revision 42e4126b
| b/hw/pci.c | ||
|---|---|---|
| 1108 | 1108 |
uint32_t address, int len) |
| 1109 | 1109 |
{
|
| 1110 | 1110 |
uint32_t val = 0; |
| 1111 |
assert(len == 1 || len == 2 || len == 4); |
|
| 1112 |
len = MIN(len, pci_config_size(d) - address); |
|
| 1111 |
|
|
| 1113 | 1112 |
memcpy(&val, d->config + address, len); |
| 1114 | 1113 |
return le32_to_cpu(val); |
| 1115 | 1114 |
} |
| ... | ... | |
| 1117 | 1116 |
void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) |
| 1118 | 1117 |
{
|
| 1119 | 1118 |
int i, was_irq_disabled = pci_irq_disabled(d); |
| 1120 |
uint32_t config_size = pci_config_size(d); |
|
| 1121 | 1119 |
|
| 1122 |
for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
|
|
| 1120 |
for (i = 0; i < l; val >>= 8, ++i) {
|
|
| 1123 | 1121 |
uint8_t wmask = d->wmask[addr + i]; |
| 1124 | 1122 |
uint8_t w1cmask = d->w1cmask[addr + i]; |
| 1125 | 1123 |
assert(!(wmask & w1cmask)); |
| b/hw/pci_host.c | ||
|---|---|---|
| 47 | 47 |
return pci_find_device(bus, bus_num, devfn); |
| 48 | 48 |
} |
| 49 | 49 |
|
| 50 |
void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr, |
|
| 51 |
uint32_t limit, uint32_t val, uint32_t len) |
|
| 52 |
{
|
|
| 53 |
assert(len <= 4); |
|
| 54 |
pci_dev->config_write(pci_dev, addr, val, MIN(len, limit - addr)); |
|
| 55 |
} |
|
| 56 |
|
|
| 57 |
uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr, |
|
| 58 |
uint32_t limit, uint32_t len) |
|
| 59 |
{
|
|
| 60 |
assert(len <= 4); |
|
| 61 |
return pci_dev->config_read(pci_dev, addr, MIN(len, limit - addr)); |
|
| 62 |
} |
|
| 63 |
|
|
| 50 | 64 |
void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len) |
| 51 | 65 |
{
|
| 52 | 66 |
PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr); |
| 53 | 67 |
uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1); |
| 54 | 68 |
|
| 55 |
if (!pci_dev) |
|
| 69 |
if (!pci_dev) {
|
|
| 56 | 70 |
return; |
| 71 |
} |
|
| 57 | 72 |
|
| 58 | 73 |
PCI_DPRINTF("%s: %s: addr=%02" PRIx32 " val=%08" PRIx32 " len=%d\n",
|
| 59 | 74 |
__func__, pci_dev->name, config_addr, val, len); |
| 60 |
pci_dev->config_write(pci_dev, config_addr, val, len); |
|
| 75 |
pci_host_config_write_common(pci_dev, config_addr, PCI_CONFIG_SPACE_SIZE, |
|
| 76 |
val, len); |
|
| 61 | 77 |
} |
| 62 | 78 |
|
| 63 | 79 |
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len) |
| ... | ... | |
| 66 | 82 |
uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1); |
| 67 | 83 |
uint32_t val; |
| 68 | 84 |
|
| 69 |
assert(len == 1 || len == 2 || len == 4); |
|
| 70 | 85 |
if (!pci_dev) {
|
| 71 | 86 |
return ~0x0; |
| 72 | 87 |
} |
| 73 | 88 |
|
| 74 |
val = pci_dev->config_read(pci_dev, config_addr, len); |
|
| 89 |
val = pci_host_config_read_common(pci_dev, config_addr, |
|
| 90 |
PCI_CONFIG_SPACE_SIZE, len); |
|
| 75 | 91 |
PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRIx32" len=%d\n",
|
| 76 | 92 |
__func__, pci_dev->name, config_addr, val, len); |
| 77 | 93 |
|
| b/hw/pci_host.h | ||
|---|---|---|
| 39 | 39 |
PCIBus *bus; |
| 40 | 40 |
}; |
| 41 | 41 |
|
| 42 |
/* common internal helpers for PCI/PCIe hosts, cut off overflows */ |
|
| 43 |
void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr, |
|
| 44 |
uint32_t limit, uint32_t val, uint32_t len); |
|
| 45 |
uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr, |
|
| 46 |
uint32_t limit, uint32_t len); |
|
| 47 |
|
|
| 42 | 48 |
void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len); |
| 43 | 49 |
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len); |
| 44 | 50 |
|
| b/hw/pcie_host.c | ||
|---|---|---|
| 57 | 57 |
{
|
| 58 | 58 |
PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr); |
| 59 | 59 |
|
| 60 |
if (!pci_dev) |
|
| 60 |
if (!pci_dev) {
|
|
| 61 | 61 |
return; |
| 62 |
|
|
| 63 |
pci_dev->config_write(pci_dev,
|
|
| 64 |
PCIE_MMCFG_CONFOFFSET(mmcfg_addr), val, len);
|
|
| 62 |
} |
|
| 63 |
pci_host_config_write_common(pci_dev, PCIE_MMCFG_CONFOFFSET(mmcfg_addr),
|
|
| 64 |
pci_config_size(pci_dev), val, len);
|
|
| 65 | 65 |
} |
| 66 | 66 |
|
| 67 | 67 |
static uint32_t pcie_mmcfg_data_read(PCIBus *s, uint32_t addr, int len) |
| 68 | 68 |
{
|
| 69 | 69 |
PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, addr); |
| 70 | 70 |
|
| 71 |
assert(len == 1 || len == 2 || len == 4); |
|
| 72 | 71 |
if (!pci_dev) {
|
| 73 | 72 |
return ~0x0; |
| 74 | 73 |
} |
| 75 |
return pci_dev->config_read(pci_dev, PCIE_MMCFG_CONFOFFSET(addr), len); |
|
| 74 |
return pci_host_config_read_common(pci_dev, PCIE_MMCFG_CONFOFFSET(addr), |
|
| 75 |
pci_config_size(pci_dev), len); |
|
| 76 | 76 |
} |
| 77 | 77 |
|
| 78 | 78 |
static void pcie_mmcfg_data_writeb(void *opaque, |
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