Revision 43661a95 pc-bios/bios.diff
| b/pc-bios/bios.diff | ||
|---|---|---|
| 1 |
? _rombios_.c |
|
| 2 |
? _rombiosl_.c |
|
| 3 |
? biossums |
|
| 4 |
? rombios.s |
|
| 5 |
? rombios.sym |
|
| 6 |
? rombios.txt |
|
| 7 |
? rombios16.bin |
|
| 8 |
? rombios32.bin |
|
| 9 |
? rombios32.out |
|
| 10 |
? rombiosl.s |
|
| 11 |
? rombiosl.sym |
|
| 12 |
? rombiosl.txt |
|
| 13 |
Index: BIOS-bochs-latest |
|
| 14 |
=================================================================== |
|
| 15 |
RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-latest,v |
|
| 16 |
retrieving revision 1.173 |
|
| 17 |
diff -u -d -p -r1.173 BIOS-bochs-latest |
|
| 18 |
Binary files /tmp/cvsItPJ31 and BIOS-bochs-latest differ |
|
| 19 |
Index: BIOS-bochs-legacy |
|
| 20 |
=================================================================== |
|
| 21 |
RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-legacy,v |
|
| 22 |
retrieving revision 1.33 |
|
| 23 |
diff -u -d -p -r1.33 BIOS-bochs-legacy |
|
| 24 |
Binary files /tmp/cvsMYE2Kz and BIOS-bochs-legacy differ |
|
| 25 |
Index: rombios.c |
|
| 26 |
=================================================================== |
|
| 27 |
RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v |
|
| 28 |
retrieving revision 1.207 |
|
| 29 |
diff -u -d -p -r1.207 rombios.c |
|
| 30 |
--- rombios.c 21 Apr 2008 14:22:01 -0000 1.207 |
|
| 31 |
+++ rombios.c 28 Apr 2008 07:53:57 -0000 |
|
| 32 |
@@ -4404,22 +4404,25 @@ BX_DEBUG_INT15("case default:\n");
|
|
| 1 |
--- bochs-2.3.7.orig/bios/rombios.h |
|
| 2 |
+++ bochs-2.3.7/bios/rombios.h |
|
| 3 |
@@ -19,7 +19,7 @@ |
|
| 4 |
// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
|
| 5 |
|
|
| 6 |
/* define it to include QEMU specific code */ |
|
| 7 |
-//#define BX_QEMU |
|
| 8 |
+#define BX_QEMU |
|
| 9 |
|
|
| 10 |
#ifndef LEGACY |
|
| 11 |
# define BX_ROMBIOS32 1 |
|
| 12 |
--- bochs-2.3.7.orig/bios/rombios.c |
|
| 13 |
+++ bochs-2.3.7/bios/rombios.c |
|
| 14 |
@@ -4404,22 +4404,25 @@ |
|
| 33 | 15 |
#endif // BX_USE_PS2_MOUSE |
| 34 | 16 |
|
| 35 | 17 |
|
| ... | ... | |
| 58 | 40 |
write_word(ES, DI+14, 0x0000); |
| 59 | 41 |
|
| 60 | 42 |
write_word(ES, DI+16, type); |
| 61 |
@@ -4432,7 +4435,9 @@ int15_function32(regs, ES, DS, FLAGS)
|
|
| 43 |
@@ -4432,7 +4435,9 @@ |
|
| 62 | 44 |
Bit16u ES, DS, FLAGS; |
| 63 | 45 |
{
|
| 64 | 46 |
Bit32u extended_memory_size=0; // 64bits long |
| ... | ... | |
| 68 | 50 |
|
| 69 | 51 |
BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
|
| 70 | 52 |
|
| 71 |
@@ -4506,11 +4511,18 @@ ASM_END
|
|
| 53 |
@@ -4506,11 +4511,18 @@ |
|
| 72 | 54 |
extended_memory_size += (1L * 1024 * 1024); |
| 73 | 55 |
} |
| 74 | 56 |
|
| ... | ... | |
| 88 | 70 |
regs.u.r32.ebx = 1; |
| 89 | 71 |
regs.u.r32.eax = 0x534D4150; |
| 90 | 72 |
regs.u.r32.ecx = 0x14; |
| 91 |
@@ -4519,7 +4531,7 @@ ASM_END
|
|
| 73 |
@@ -4519,7 +4531,7 @@ |
|
| 92 | 74 |
break; |
| 93 | 75 |
case 1: |
| 94 | 76 |
set_e820_range(ES, regs.u.r16.di, |
| ... | ... | |
| 97 | 79 |
regs.u.r32.ebx = 2; |
| 98 | 80 |
regs.u.r32.eax = 0x534D4150; |
| 99 | 81 |
regs.u.r32.ecx = 0x14; |
| 100 |
@@ -4528,7 +4540,7 @@ ASM_END
|
|
| 82 |
@@ -4528,7 +4540,7 @@ |
|
| 101 | 83 |
break; |
| 102 | 84 |
case 2: |
| 103 | 85 |
set_e820_range(ES, regs.u.r16.di, |
| ... | ... | |
| 106 | 88 |
regs.u.r32.ebx = 3; |
| 107 | 89 |
regs.u.r32.eax = 0x534D4150; |
| 108 | 90 |
regs.u.r32.ecx = 0x14; |
| 109 |
@@ -4539,7 +4551,7 @@ ASM_END
|
|
| 91 |
@@ -4539,7 +4551,7 @@ |
|
| 110 | 92 |
#if BX_ROMBIOS32 |
| 111 | 93 |
set_e820_range(ES, regs.u.r16.di, |
| 112 | 94 |
0x00100000L, |
| ... | ... | |
| 115 | 97 |
regs.u.r32.ebx = 4; |
| 116 | 98 |
#else |
| 117 | 99 |
set_e820_range(ES, regs.u.r16.di, |
| 118 |
@@ -4555,7 +4567,7 @@ ASM_END
|
|
| 100 |
@@ -4555,7 +4567,7 @@ |
|
| 119 | 101 |
case 4: |
| 120 | 102 |
set_e820_range(ES, regs.u.r16.di, |
| 121 | 103 |
extended_memory_size - ACPI_DATA_SIZE, |
| ... | ... | |
| 124 | 106 |
regs.u.r32.ebx = 5; |
| 125 | 107 |
regs.u.r32.eax = 0x534D4150; |
| 126 | 108 |
regs.u.r32.ecx = 0x14; |
| 127 |
@@ -4565,7 +4577,20 @@ ASM_END
|
|
| 109 |
@@ -4565,7 +4577,20 @@ |
|
| 128 | 110 |
case 5: |
| 129 | 111 |
/* 256KB BIOS area at the end of 4 GB */ |
| 130 | 112 |
set_e820_range(ES, regs.u.r16.di, |
| ... | ... | |
| 146 | 128 |
regs.u.r32.ebx = 0; |
| 147 | 129 |
regs.u.r32.eax = 0x534D4150; |
| 148 | 130 |
regs.u.r32.ecx = 0x14; |
| 149 |
Index: rombios.h |
|
| 150 |
=================================================================== |
|
| 151 |
RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v |
|
| 152 |
retrieving revision 1.6 |
|
| 153 |
diff -u -d -p -r1.6 rombios.h |
|
| 154 |
--- rombios.h 26 Jan 2008 09:15:27 -0000 1.6 |
|
| 155 |
+++ rombios.h 28 Apr 2008 07:53:57 -0000 |
|
| 156 |
@@ -19,7 +19,7 @@ |
|
| 157 |
// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
|
| 158 |
|
|
| 159 |
/* define it to include QEMU specific code */ |
|
| 160 |
-//#define BX_QEMU |
|
| 161 |
+#define BX_QEMU |
|
| 162 |
|
|
| 163 |
#ifndef LEGACY |
|
| 164 |
# define BX_ROMBIOS32 1 |
|
| 165 |
Index: rombios32.c |
|
| 166 |
=================================================================== |
|
| 167 |
RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v |
|
| 168 |
retrieving revision 1.26 |
|
| 169 |
diff -u -d -p -r1.26 rombios32.c |
|
| 170 |
--- rombios32.c 8 Apr 2008 16:41:18 -0000 1.26 |
|
| 171 |
+++ rombios32.c 28 Apr 2008 07:53:58 -0000 |
|
| 172 |
@@ -478,7 +478,12 @@ void smp_probe(void) |
|
| 131 |
--- bochs-2.3.7.orig/bios/rombios32.c |
|
| 132 |
+++ bochs-2.3.7/bios/rombios32.c |
|
| 133 |
@@ -479,7 +479,12 @@ |
|
| 173 | 134 |
sipi_vector = AP_BOOT_ADDR >> 12; |
| 174 | 135 |
writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector); |
| 175 | 136 |
|
| ... | ... | |
| 182 | 143 |
|
| 183 | 144 |
smp_cpus = readw((void *)CPU_COUNT_ADDR); |
| 184 | 145 |
} |
| 185 |
@@ -1423,9 +1428,8 @@ void acpi_bios_init(void) |
|
| 186 |
fadt->pm1_evt_len = 4; |
|
| 187 |
fadt->pm1_cnt_len = 2; |
|
| 188 |
fadt->pm_tmr_len = 4; |
|
| 189 |
- fadt->plvl2_lat = cpu_to_le16(50); |
|
| 190 |
- fadt->plvl3_lat = cpu_to_le16(50); |
|
| 191 |
- fadt->plvl3_lat = cpu_to_le16(50); |
|
| 192 |
+ fadt->plvl2_lat = cpu_to_le16(0x0fff); // C2 state not supported |
|
| 193 |
+ fadt->plvl3_lat = cpu_to_le16(0x0fff); // C3 state not supported |
|
| 194 |
/* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */ |
|
| 195 |
fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6)); |
|
| 196 |
acpi_build_table_header((struct acpi_table_header *)fadt, "FACP", |
|
Also available in: Unified diff