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/*
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 *  ARM execution defines
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 *
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "config.h"
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#include "dyngen-exec.h"
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register struct CPUARMState *env asm(AREG0);
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register uint32_t T0 asm(AREG1);
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register uint32_t T1 asm(AREG2);
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register uint32_t T2 asm(AREG3);
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#define M0   env->iwmmxt.val
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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                              int mmu_idx, int is_softmmu);
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static inline int cpu_halted(CPUState *env) {
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    if (!env->halted)
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        return 0;
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    /* An interrupt wakes the CPU even if the I and F CPSR bits are
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       set.  We use EXITTB to silently wake CPU without causing an
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       actual interrupt.  */
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    if (env->interrupt_request &
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        (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) {
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        env->halted = 0;
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        return 0;
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    }
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    return EXCP_HALTED;
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#endif
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/* In op_helper.c */
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void helper_set_cp(CPUState *, uint32_t, uint32_t);
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uint32_t helper_get_cp(CPUState *, uint32_t);
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void helper_set_cp15(CPUState *, uint32_t, uint32_t);
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uint32_t helper_get_cp15(CPUState *, uint32_t);
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uint32_t helper_v7m_mrs(CPUState *env, int reg);
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void helper_v7m_msr(CPUState *env, int reg, uint32_t val);
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void helper_mark_exclusive(CPUARMState *, uint32_t addr);
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int helper_test_exclusive(CPUARMState *, uint32_t addr);
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void helper_clrex(CPUARMState *env);
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void cpu_loop_exit(void);
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void raise_exception(int);
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void helper_neon_tbl(int rn, int maxindex);
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uint32_t helper_neon_mul_p8(uint32_t op1, uint32_t op2);