Revision 4373f3ce target-arm/exec.h

b/target-arm/exec.h
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register uint32_t T1 asm(AREG2);
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register uint32_t T2 asm(AREG3);
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/* TODO: Put these in FP regs on targets that have such things.  */
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/* It is ok for FT0s and FT0d to overlap.  Likewise FT1s and FT1d.  */
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#define FT0s env->vfp.tmp0s
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#define FT1s env->vfp.tmp1s
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#define FT0d env->vfp.tmp0d
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#define FT1d env->vfp.tmp1d
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#define M0   env->iwmmxt.val
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#include "cpu.h"
......
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void raise_exception(int);
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void do_vfp_abss(void);
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void do_vfp_absd(void);
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void do_vfp_negs(void);
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void do_vfp_negd(void);
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void do_vfp_sqrts(void);
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void do_vfp_sqrtd(void);
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void do_vfp_cmps(void);
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void do_vfp_cmpd(void);
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void do_vfp_cmpes(void);
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void do_vfp_cmped(void);
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void do_vfp_set_fpscr(void);
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void do_vfp_get_fpscr(void);
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float32 helper_recps_f32(float32, float32);
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float32 helper_rsqrts_f32(float32, float32);
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uint32_t helper_recpe_u32(uint32_t);
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uint32_t helper_rsqrte_u32(uint32_t);
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float32 helper_recpe_f32(float32);
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float32 helper_rsqrte_f32(float32);
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void helper_neon_tbl(int rn, int maxindex);
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uint32_t helper_neon_mul_p8(uint32_t op1, uint32_t op2);

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