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/*
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* ARM micro operations
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*
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* Copyright (c) 2003 Fabrice Bellard
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* Copyright (c) 2005-2007 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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void OPPROTO op_addl_T0_T1_cc(void) |
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{ |
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unsigned int src1; |
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src1 = T0; |
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T0 += T1; |
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env->NZF = T0; |
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env->CF = T0 < src1; |
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env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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} |
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void OPPROTO op_adcl_T0_T1_cc(void) |
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{ |
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unsigned int src1; |
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src1 = T0; |
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if (!env->CF) {
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T0 += T1; |
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env->CF = T0 < src1; |
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} else {
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T0 += T1 + 1;
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env->CF = T0 <= src1; |
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} |
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env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
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env->NZF = T0; |
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FORCE_RET(); |
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} |
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#define OPSUB(sub, sbc, res, T0, T1) \
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\ |
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void OPPROTO op_ ## sub ## l_T0_T1_cc(void) \ |
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{ \ |
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unsigned int src1; \ |
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src1 = T0; \ |
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T0 -= T1; \ |
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env->NZF = T0; \ |
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env->CF = src1 >= T1; \ |
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env->VF = (src1 ^ T1) & (src1 ^ T0); \ |
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res = T0; \ |
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} \ |
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\ |
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void OPPROTO op_ ## sbc ## l_T0_T1_cc(void) \ |
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{ \ |
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unsigned int src1; \ |
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src1 = T0; \ |
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if (!env->CF) { \
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T0 = T0 - T1 - 1; \
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env->CF = src1 > T1; \ |
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} else { \
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T0 = T0 - T1; \ |
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env->CF = src1 >= T1; \ |
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} \ |
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env->VF = (src1 ^ T1) & (src1 ^ T0); \ |
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env->NZF = T0; \ |
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res = T0; \ |
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FORCE_RET(); \ |
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} |
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OPSUB(sub, sbc, T0, T0, T1) |
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OPSUB(rsb, rsc, T0, T1, T0) |
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void OPPROTO op_addq_T0_T1(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)T1 << 32) | T0;
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res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
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T1 = res >> 32;
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T0 = res; |
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} |
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void OPPROTO op_addq_lo_T0_T1(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)T1 << 32) | T0;
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res += (uint64_t)(env->regs[PARAM1]); |
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T1 = res >> 32;
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T0 = res; |
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} |
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/* Dual 16-bit accumulate. */
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void OPPROTO op_addq_T0_T1_dual(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
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res += (int32_t)T0; |
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res += (int32_t)T1; |
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env->regs[PARAM1] = (uint32_t)res; |
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env->regs[PARAM2] = res >> 32;
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} |
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/* Dual 16-bit subtract accumulate. */
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void OPPROTO op_subq_T0_T1_dual(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
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res += (int32_t)T0; |
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res -= (int32_t)T1; |
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env->regs[PARAM1] = (uint32_t)res; |
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env->regs[PARAM2] = res >> 32;
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} |
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void OPPROTO op_logicq_cc(void) |
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{ |
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env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0); |
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} |
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/* memory access */
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#define MEMSUFFIX _raw
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#include "op_mem.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_mem.h" |
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#define MEMSUFFIX _kernel
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#include "op_mem.h" |
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#endif
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void OPPROTO op_clrex(void) |
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{ |
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cpu_lock(); |
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helper_clrex(env); |
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cpu_unlock(); |
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} |
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/* T1 based, use T0 as shift count */
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void OPPROTO op_shll_T1_T0(void) |
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{ |
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int shift;
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shift = T0 & 0xff;
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if (shift >= 32) |
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T1 = 0;
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else
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T1 = T1 << shift; |
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FORCE_RET(); |
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} |
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void OPPROTO op_shrl_T1_T0(void) |
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{ |
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int shift;
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shift = T0 & 0xff;
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if (shift >= 32) |
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T1 = 0;
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else
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T1 = (uint32_t)T1 >> shift; |
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FORCE_RET(); |
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} |
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void OPPROTO op_sarl_T1_T0(void) |
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{ |
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int shift;
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shift = T0 & 0xff;
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if (shift >= 32) |
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shift = 31;
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T1 = (int32_t)T1 >> shift; |
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} |
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void OPPROTO op_rorl_T1_T0(void) |
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{ |
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int shift;
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shift = T0 & 0x1f;
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if (shift) {
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T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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} |
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FORCE_RET(); |
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} |
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/* T1 based, use T0 as shift count and compute CF */
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void OPPROTO op_shll_T1_T0_cc(void) |
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{ |
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int shift;
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shift = T0 & 0xff;
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if (shift >= 32) { |
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if (shift == 32) |
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env->CF = T1 & 1;
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else
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env->CF = 0;
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T1 = 0;
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} else if (shift != 0) { |
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env->CF = (T1 >> (32 - shift)) & 1; |
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T1 = T1 << shift; |
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} |
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FORCE_RET(); |
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} |
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void OPPROTO op_shrl_T1_T0_cc(void) |
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{ |
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int shift;
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shift = T0 & 0xff;
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if (shift >= 32) { |
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if (shift == 32) |
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env->CF = (T1 >> 31) & 1; |
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else
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env->CF = 0;
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T1 = 0;
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} else if (shift != 0) { |
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env->CF = (T1 >> (shift - 1)) & 1; |
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T1 = (uint32_t)T1 >> shift; |
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} |
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FORCE_RET(); |
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} |
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void OPPROTO op_sarl_T1_T0_cc(void) |
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{ |
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int shift;
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shift = T0 & 0xff;
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if (shift >= 32) { |
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env->CF = (T1 >> 31) & 1; |
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T1 = (int32_t)T1 >> 31;
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} else if (shift != 0) { |
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env->CF = (T1 >> (shift - 1)) & 1; |
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T1 = (int32_t)T1 >> shift; |
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} |
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FORCE_RET(); |
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} |
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void OPPROTO op_rorl_T1_T0_cc(void) |
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{ |
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int shift1, shift;
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shift1 = T0 & 0xff;
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shift = shift1 & 0x1f;
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if (shift == 0) { |
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if (shift1 != 0) |
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env->CF = (T1 >> 31) & 1; |
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} else {
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env->CF = (T1 >> (shift - 1)) & 1; |
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T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
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} |
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FORCE_RET(); |
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} |
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void OPPROTO op_movl_cp_T0(void) |
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{ |
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helper_set_cp(env, PARAM1, T0); |
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FORCE_RET(); |
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} |
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void OPPROTO op_movl_T0_cp(void) |
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{ |
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T0 = helper_get_cp(env, PARAM1); |
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FORCE_RET(); |
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} |
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void OPPROTO op_movl_cp15_T0(void) |
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{ |
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helper_set_cp15(env, PARAM1, T0); |
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FORCE_RET(); |
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} |
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void OPPROTO op_movl_T0_cp15(void) |
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{ |
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T0 = helper_get_cp15(env, PARAM1); |
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FORCE_RET(); |
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} |
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void OPPROTO op_v7m_mrs_T0(void) |
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{ |
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T0 = helper_v7m_mrs(env, PARAM1); |
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} |
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void OPPROTO op_v7m_msr_T0(void) |
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{ |
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helper_v7m_msr(env, PARAM1, T0); |
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} |
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void OPPROTO op_movl_T0_sp(void) |
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{ |
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if (PARAM1 == env->v7m.current_sp)
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T0 = env->regs[13];
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else
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T0 = env->v7m.other_sp; |
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FORCE_RET(); |
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} |
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#include "op_neon.h" |
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/* iwMMXt support */
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#include "op_iwmmxt.c" |