Revision 44a99354

b/hw/ide/cmd646.c
235 235

  
236 236
    vmstate_register(0, &vmstate_ide_pci, d);
237 237
    qemu_register_reset(cmd646_reset, d);
238
    cmd646_reset(d);
239 238
    return 0;
240 239
}
241 240

  
b/hw/parallel.c
471 471

  
472 472
    base = isa->iobase;
473 473
    isa_init_irq(dev, &s->irq, isa->isairq);
474
    parallel_reset(s);
475 474
    qemu_register_reset(parallel_reset, s);
476 475

  
477 476
    if (qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
......
576 575
    s->irq = irq;
577 576
    s->chr = chr;
578 577
    s->it_shift = it_shift;
579
    parallel_reset(s);
580 578
    qemu_register_reset(parallel_reset, s);
581 579

  
582 580
    io_sw = cpu_register_io_memory(parallel_mm_read_sw, parallel_mm_write_sw, s);
b/hw/pckbd.c
397 397
    s->irq_mouse = mouse_irq;
398 398
    s->mask = mask;
399 399

  
400
    kbd_reset(s);
401 400
    vmstate_register(0, &vmstate_kbd, s);
402 401
    s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
403 402
    cpu_register_physical_memory(base, size, s_io_memory);
......
422 421
    isa_init_irq(dev, &s->irq_kbd, 1);
423 422
    isa_init_irq(dev, &s->irq_mouse, 12);
424 423

  
425
    kbd_reset(s);
426 424
    vmstate_register(0, &vmstate_kbd, s);
427 425
    register_ioport_read(0x60, 1, 1, kbd_read_data, s);
428 426
    register_ioport_write(0x60, 1, 1, kbd_write_data, s);
b/hw/ps2.c
593 593
    s->common.update_irq = update_irq;
594 594
    s->common.update_arg = update_arg;
595 595
    s->scancode_set = 2;
596
    ps2_kbd_reset(s);
597 596
    vmstate_register(0, &vmstate_ps2_keyboard, s);
598 597
    qemu_add_kbd_event_handler(ps2_put_keycode, s);
599 598
    qemu_register_reset(ps2_kbd_reset, s);
......
606 605

  
607 606
    s->common.update_irq = update_irq;
608 607
    s->common.update_arg = update_arg;
609
    ps2_mouse_reset(s);
610 608
    vmstate_register(0, &vmstate_ps2_mouse, s);
611 609
    qemu_add_mouse_event_handler(ps2_mouse_event, s, 0, "QEMU PS/2 Mouse");
612 610
    qemu_register_reset(ps2_mouse_reset, s);
b/hw/sun4u.c
268 268

  
269 269
typedef struct ResetData {
270 270
    CPUState *env;
271
    uint64_t reset_addr;
271
    uint64_t prom_addr;
272 272
} ResetData;
273 273

  
274 274
static void main_cpu_reset(void *opaque)
275 275
{
276 276
    ResetData *s = (ResetData *)opaque;
277 277
    CPUState *env = s->env;
278
    static unsigned int nr_resets;
278 279

  
279 280
    cpu_reset(env);
280 281
    env->tick_cmpr = TICK_INT_DIS | 0;
......
289 290
    env->gregs[1] = 0; // Memory start
290 291
    env->gregs[2] = ram_size; // Memory size
291 292
    env->gregs[3] = 0; // Machine description XXX
292
    env->pc = s->reset_addr;
293
    if (nr_resets++ == 0) {
294
        /* Power on reset */
295
        env->pc = s->prom_addr + 0x20ULL;
296
    } else {
297
        env->pc = s->prom_addr + 0x40ULL;
298
    }
293 299
    env->npc = env->pc + 4;
294 300
}
295 301

  
......
544 550

  
545 551
    reset_info = qemu_mallocz(sizeof(ResetData));
546 552
    reset_info->env = env;
547
    reset_info->reset_addr = hwdef->prom_addr + 0x40ULL;
553
    reset_info->prom_addr = hwdef->prom_addr;
548 554
    qemu_register_reset(main_cpu_reset, reset_info);
549
    main_cpu_reset(reset_info);
550
    // Override warm reset address with cold start address
551
    env->pc = hwdef->prom_addr + 0x20ULL;
552
    env->npc = env->pc + 4;
553 555

  
554 556
    return env;
555 557
}

Also available in: Unified diff