Revision 44cd42ee target-cris/mmu.c
b/target-cris/mmu.c | ||
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32 | 32 |
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33 | 33 |
#define D(x) |
34 | 34 |
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void cris_mmu_init(CPUState *env) |
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{ |
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env->mmu_rand_lfsr = 0xcccc; |
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} |
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#define SR_POLYNOM 0x8805 |
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static inline unsigned int compute_polynom(unsigned int sr) |
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{ |
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unsigned int i; |
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unsigned int f; |
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f = 0; |
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for (i = 0; i < 16; i++) |
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f += ((SR_POLYNOM >> i) & 1) & ((sr >> i) & 1); |
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return f; |
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} |
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35 | 53 |
static inline int cris_mmu_enabled(uint32_t rw_gc_cfg) |
36 | 54 |
{ |
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return (rw_gc_cfg & 12) != 0; |
... | ... | |
152 | 170 |
hi = env->tlbsets[mmu][set][idx].hi; |
153 | 171 |
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154 | 172 |
tlb_vpn = EXTRACT_FIELD(hi, 13, 31); |
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tlb_pid = EXTRACT_FIELD(hi, 0, 7); |
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155 | 174 |
tlb_pfn = EXTRACT_FIELD(lo, 13, 31); |
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tlb_g = EXTRACT_FIELD(lo, 4, 4); |
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156 | 176 |
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D(printf("TLB[%d][%d] v=%x vpage=%x -> pfn=%x lo=%x hi=%x\n", |
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i, idx, tlb_vpn, vpage, tlb_pfn, lo, hi)); |
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if (tlb_vpn == vpage) { |
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if ((tlb_g || (tlb_pid == (env->pregs[PR_PID] & 0xff))) |
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&& tlb_vpn == vpage) { |
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160 | 181 |
match = 1; |
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break; |
162 | 183 |
} |
... | ... | |
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cfg_x = EXTRACT_FIELD(r_cfg, 17, 17); |
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cfg_v = EXTRACT_FIELD(r_cfg, 16, 16); |
171 | 192 |
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tlb_pid = EXTRACT_FIELD(hi, 0, 7); |
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173 | 193 |
tlb_pfn = EXTRACT_FIELD(lo, 13, 31); |
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tlb_g = EXTRACT_FIELD(lo, 4, 4); |
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175 | 194 |
tlb_v = EXTRACT_FIELD(lo, 3, 3); |
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tlb_k = EXTRACT_FIELD(lo, 2, 2); |
177 | 196 |
tlb_w = EXTRACT_FIELD(lo, 1, 1); |
... | ... | |
187 | 206 |
set_exception_vector(0x0a, d_mmu_access); |
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set_exception_vector(0x0b, d_mmu_write); |
189 | 208 |
*/ |
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if (!tlb_g |
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&& tlb_pid != (env->pregs[PR_PID] & 0xff)) { |
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D(printf ("tlb: wrong pid %x %x pc=%x\n", |
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tlb_pid, env->pregs[PR_PID], env->pc)); |
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match = 0; |
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res->bf_vec = vect_base; |
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} else if (cfg_k && tlb_k && usermode) { |
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if (cfg_k && tlb_k && usermode) { |
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197 | 210 |
D(printf ("tlb: kernel protected %x lo=%x pc=%x\n", |
198 | 211 |
vaddr, lo, env->pc)); |
199 | 212 |
match = 0; |
... | ... | |
229 | 242 |
|
230 | 243 |
env->sregs[SFR_RW_MM_TLB_HI] = hi; |
231 | 244 |
env->sregs[SFR_RW_MM_TLB_LO] = lo; |
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} else { |
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/* If refill, provide a randomized set. */ |
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set = env->mmu_rand_lfsr & 3; |
|
232 | 248 |
} |
233 | 249 |
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234 | 250 |
if (!match) { |
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/* miss. */ |
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unsigned int f; |
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/* Update lfsr at every fault. */ |
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f = compute_polynom(env->mmu_rand_lfsr); |
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env->mmu_rand_lfsr >>= 1; |
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env->mmu_rand_lfsr |= (f << 15); |
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env->mmu_rand_lfsr &= 0xffff; |
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/* Compute index. */ |
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idx = vpage & 15; |
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set = 0; |
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238 | 261 |
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239 | 262 |
/* Update RW_MM_TLB_SEL. */ |
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env->sregs[SFR_RW_MM_TLB_SEL] = 0; |
241 | 264 |
set_field(&env->sregs[SFR_RW_MM_TLB_SEL], idx, 0, 4); |
242 |
set_field(&env->sregs[SFR_RW_MM_TLB_SEL], set, 4, 5);
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set_field(&env->sregs[SFR_RW_MM_TLB_SEL], set, 4, 2);
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243 | 266 |
|
244 | 267 |
/* Update RW_MM_CAUSE. */ |
245 | 268 |
set_field(&r_cause, rwcause, 8, 2); |
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