Revision 45d827d2 target-ppc/op_helper.c
b/target-ppc/op_helper.c | ||
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#include "helper.h" |
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#include "helper_regs.h" |
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#include "op_helper.h" |
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//#define DEBUG_OP |
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//#define DEBUG_EXCEPTIONS |
... | ... | |
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} |
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} |
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target_ulong ppc_load_dump_spr (int sprn) |
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/*****************************************************************************/ |
|
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/* SPR accesses */ |
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void helper_load_dump_spr (uint32_t sprn) |
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
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sprn, sprn, env->spr[sprn]); |
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} |
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return env->spr[sprn]; |
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} |
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void ppc_store_dump_spr (int sprn, target_ulong val)
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void helper_store_dump_spr (uint32_t sprn)
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", |
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sprn, sprn, env->spr[sprn], val); |
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fprintf(logfile, "Write SPR %d %03x <= " ADDRX "\n", |
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sprn, sprn, env->spr[sprn]); |
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} |
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} |
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target_ulong helper_load_tbl (void) |
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{ |
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return cpu_ppc_load_tbl(env); |
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} |
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target_ulong helper_load_tbu (void) |
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{ |
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return cpu_ppc_load_tbu(env); |
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} |
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target_ulong helper_load_atbl (void) |
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{ |
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return cpu_ppc_load_atbl(env); |
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} |
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target_ulong helper_load_atbu (void) |
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{ |
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return cpu_ppc_load_atbu(env); |
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} |
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target_ulong helper_load_601_rtcl (void) |
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{ |
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return cpu_ppc601_load_rtcl(env); |
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} |
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target_ulong helper_load_601_rtcu (void) |
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{ |
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return cpu_ppc601_load_rtcu(env); |
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} |
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#if !defined(CONFIG_USER_ONLY) |
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#if defined (TARGET_PPC64) |
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void helper_store_asr (target_ulong val) |
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{ |
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ppc_store_asr(env, val); |
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} |
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#endif |
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void helper_store_sdr1 (target_ulong val) |
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{ |
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ppc_store_sdr1(env, val); |
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} |
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void helper_store_tbl (target_ulong val) |
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{ |
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cpu_ppc_store_tbl(env, val); |
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} |
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void helper_store_tbu (target_ulong val) |
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{ |
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cpu_ppc_store_tbu(env, val); |
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} |
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void helper_store_atbl (target_ulong val) |
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{ |
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cpu_ppc_store_atbl(env, val); |
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} |
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void helper_store_atbu (target_ulong val) |
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{ |
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cpu_ppc_store_atbu(env, val); |
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} |
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void helper_store_601_rtcl (target_ulong val) |
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{ |
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cpu_ppc601_store_rtcl(env, val); |
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} |
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void helper_store_601_rtcu (target_ulong val) |
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{ |
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cpu_ppc601_store_rtcu(env, val); |
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} |
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target_ulong helper_load_decr (void) |
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{ |
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return cpu_ppc_load_decr(env); |
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} |
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void helper_store_decr (target_ulong val) |
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{ |
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cpu_ppc_store_decr(env, val); |
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} |
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void helper_store_hid0_601 (target_ulong val) |
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{ |
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target_ulong hid0; |
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hid0 = env->spr[SPR_HID0]; |
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if ((val ^ hid0) & 0x00000008) { |
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/* Change current endianness */ |
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env->hflags &= ~(1 << MSR_LE); |
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env->hflags_nmsr &= ~(1 << MSR_LE); |
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env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE); |
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env->hflags |= env->hflags_nmsr; |
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if (loglevel != 0) { |
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fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n", |
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__func__, val & 0x8 ? 'l' : 'b', env->hflags); |
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} |
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} |
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env->spr[sprn] = val; |
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env->spr[SPR_HID0] = (uint32_t)val; |
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} |
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void helper_store_403_pbr (uint32_t num, target_ulong value) |
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{ |
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if (likely(env->pb[num] != value)) { |
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env->pb[num] = value; |
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/* Should be optimized */ |
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tlb_flush(env, 1); |
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} |
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} |
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target_ulong helper_load_40x_pit (void) |
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{ |
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return load_40x_pit(env); |
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} |
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void helper_store_40x_pit (target_ulong val) |
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{ |
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store_40x_pit(env, val); |
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} |
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void helper_store_40x_dbcr0 (target_ulong val) |
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{ |
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store_40x_dbcr0(env, val); |
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} |
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void helper_store_40x_sler (target_ulong val) |
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{ |
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store_40x_sler(env, val); |
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} |
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void helper_store_booke_tcr (target_ulong val) |
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{ |
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store_booke_tcr(env, val); |
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} |
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void helper_store_booke_tsr (target_ulong val) |
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{ |
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store_booke_tsr(env, val); |
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} |
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void helper_store_ibatu (uint32_t nr, target_ulong val) |
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{ |
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ppc_store_ibatu(env, nr, val); |
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} |
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void helper_store_ibatl (uint32_t nr, target_ulong val) |
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{ |
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ppc_store_ibatl(env, nr, val); |
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} |
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void helper_store_dbatu (uint32_t nr, target_ulong val) |
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{ |
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ppc_store_dbatu(env, nr, val); |
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} |
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void helper_store_dbatl (uint32_t nr, target_ulong val) |
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{ |
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ppc_store_dbatl(env, nr, val); |
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} |
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void helper_store_601_batl (uint32_t nr, target_ulong val) |
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{ |
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ppc_store_ibatl_601(env, nr, val); |
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} |
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void helper_store_601_batu (uint32_t nr, target_ulong val) |
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{ |
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ppc_store_ibatu_601(env, nr, val); |
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} |
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#endif |
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/*****************************************************************************/ |
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/* Memory load and stores */ |
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|
... | ... | |
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{ |
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do_rfi(env->lr, env->ctr, 0x0000FFFF, 0); |
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} |
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void do_store_hid0_601 (void) |
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{ |
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uint32_t hid0; |
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hid0 = env->spr[SPR_HID0]; |
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if ((T0 ^ hid0) & 0x00000008) { |
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/* Change current endianness */ |
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env->hflags &= ~(1 << MSR_LE); |
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env->hflags_nmsr &= ~(1 << MSR_LE); |
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env->hflags_nmsr |= (1 << MSR_LE) & (((T0 >> 3) & 1) << MSR_LE); |
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env->hflags |= env->hflags_nmsr; |
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if (loglevel != 0) { |
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fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n", |
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__func__, T0 & 0x8 ? 'l' : 'b', env->hflags); |
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} |
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} |
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env->spr[SPR_HID0] = T0; |
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} |
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#endif |
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/*****************************************************************************/ |
... | ... | |
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if (likely(arg < 602)) { |
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#if defined(USE_MFROM_ROM_TABLE) |
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#include "mfrom_table.c" |
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return mfrom_ROM_table[T0];
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return mfrom_ROM_table[arg];
|
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#else |
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double d; |
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/* Extremly decomposed: |
... | ... | |
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POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
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} else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) { |
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if (loglevel != 0) { |
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fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0);
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fprintf(logfile, "DCR read error %d %03x\n", (int)dcrn, (int)dcrn);
|
|
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} |
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raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
... | ... | |
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POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
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} else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) { |
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if (loglevel != 0) { |
1768 |
fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0);
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fprintf(logfile, "DCR write error %d %03x\n", (int)dcrn, (int)dcrn);
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} |
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raise_exception_err(env, POWERPC_EXCP_PROGRAM, |
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POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
... | ... | |
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do_rfi(env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, |
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~((target_ulong)0x3FFF0000), 0); |
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} |
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|
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void do_load_403_pb (int num) |
|
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{ |
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T0 = env->pb[num]; |
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} |
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|
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1805 |
void do_store_403_pb (int num) |
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1806 |
{ |
|
1807 |
if (likely(env->pb[num] != T0)) { |
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1808 |
env->pb[num] = T0; |
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/* Should be optimized */ |
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1810 |
tlb_flush(env, 1); |
|
1811 |
} |
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1812 |
} |
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1813 | 1950 |
#endif |
1814 | 1951 |
|
1815 | 1952 |
/* 440 specific */ |
... | ... | |
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|
2540 | 2677 |
void helper_store_sr (target_ulong sr_num, target_ulong val) |
2541 | 2678 |
{ |
2542 |
do_store_sr(env, sr_num, val);
|
|
2679 |
ppc_store_sr(env, sr_num, val);
|
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2543 | 2680 |
} |
2544 | 2681 |
|
2545 | 2682 |
/* SLB management */ |
Also available in: Unified diff