History | View | Annotate | Download (11.1 kB)
x86: mcg_cap is never 0
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
x86: port segments to vmstate
x86: factor out cpu_pre_save()
x86: factor out cpu_pre/post_load()
x86: add fpregs_format_vmstate
Don't even ask, being able to load/save between 64<->80bit floats should be forbidden
x86: mce_banks always have the same size
mce_banks is always MCE_BANKS_DEF * 4 in size, value never change
CC: Huang Ying <ying.huang@intel.com>Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
x86: send mce_banks as an array
x86: fpuc is uint16_t not unsigned int
x86: fpus is uint16_t not unsigned int
We save more that fpus on that 16 bits (fpstt), we need an additional field
x86: add fptag_vmstate to the state
It is needed to store fptags
x86: add pending_irq_vmstate to the state
It is needed to save the interrupt_bitmap
x86: hflags is not modified at all, just save it directly
x86: make a20_mask int32_t
This makes the savevm code correct, and sign extensins gives us exactlywhat we need (namely, sign extend to 64 bits when used with 64bit addresess.
Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax....
target-i386: add RDTSCP support
RDTSCP reads the time stamp counter and atomically also the contentof a 32-bit MSR, which can be freely set by the OS. This allows CPUlocal data to be queried by userspace.Linux uses this to allow a fast implementation of the getcpu()...
kvm: Simplify cpu_synchronize_state()
cpu_synchronize_state() is a little unreadable since the 'modified'argument isn't self-explanatory. Simplify it by making it alwayssynchronize the kernel state into qemu, and automatically flush theregisters back to the kernel if they've been synchronized on this...
QEMU: MCE: Add MCE simulation to qemu/tcg
- MCE features are initialized when VCPU is intialized according to CPUID.- A monitor command "mce" is added to inject a MCE.- A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE.
aliguori: fix build for linux-user...
Use ctz64 in favor of ffsll
Not all host platforms support ffsll.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
KVM: x86: Refactor persistent CPU state
This patch aligns the KVM-related layout and encoding of the CPU stateto be saved to disk or migrated with qemu-kvm. The major differences arereordering of fields and a compressed interrupt_bitmap into a singlenumber as there can be no more than one pending IRQ at a time....
kvm: x86: Save/restore KVM-specific CPU states
Save and restore all so far neglected KVM-specific CPU states. Handlingthe TSC stabilizes migration in KVM mode. The interrupt_bitmap andmp_state are currently unused, but will become relevant for in-kernel...
kvm: Add missing bits to support live migration
This patch adds the missing hooks to allow live migration in KVM mode.It adds proper synchronization before/after saving/restoring the VCPUstates (note: PPC is untested), hooks intocpu_physical_memory_set_dirty_tracking() to enable dirty memory logging...
Convert machine registration to use module init functions
This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
xen: groundwork for xen support (Gerd Hoffmann)
- configure script and build system changes.- wind up new machine type.- add xen* command line options.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
MTRR support on x86, part 2 (Carl-Daniel Hailfinger)
Load and save MTRR state together with machine state.
Add support for the MTRRcap MSR which is used by the latest Bochs BIOSand some operating systems.
Fix a typo in ext2_feature_name.
With this patch, MTRR emulation should be good enough to not trigger any...
x86: Debug register emulation (Jan Kiszka)
Built on top of previously enhanced breakpoint/watchpoint support, thispatch adds full debug register emulation for the x86 architecture.
Many corner cases were considered, and the result was successfullytested inside a Linux guest with gdb, but I won't be surprised if one...
Fix restore of older snapshots for target-i386 on big endian hosts
A target_ulong may be 64-bit. Passing it to a function expecting a 32-bitpointer is wrong and unfortunately happens to work for x86. It won't work onbig endian hosts though. Change the code to work properly on all hosts....
Resurrect the safe part of r5274
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5401 c046a42c-6fe2-441c-8c8c-71466251a162
Fix save/restore regression introduced by r5318
sysenter_cs is a u32 and is loaded as a u32.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5351 c046a42c-6fe2-441c-8c8c-71466251a162
Revert r5274 which breaks savevm/loadvm
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5321 c046a42c-6fe2-441c-8c8c-71466251a162
SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patchmakes both 64-bit aware and enables them for Intel CPUs.Add cpu save/load for 64-bit wide sysenter variables.
Signed-off-by: Alexander Graf <agraf@suse.de>...
Add signed versions of save/load functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5274 c046a42c-6fe2-441c-8c8c-71466251a162
Move interrupt_request and user_mode_only to common cpu state.Save and restore env->interrupt_request and env->halted.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
save more CPU state
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4669 c046a42c-6fe2-441c-8c8c-71466251a162
Correctly save and restore env->a20_mask now that it is a 64-bitvariable. Noticed by Erik de Castro Lopo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4334 c046a42c-6fe2-441c-8c8c-71466251a162
remove target ifdefs from vl.c
(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162