Revision 46e50e9d hw/ide.c
| b/hw/ide.c | ||
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| 1579 | 1579 |
} |
| 1580 | 1580 |
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| 1581 | 1581 |
/* hd_table must contain 4 block drivers */ |
| 1582 |
void pci_ide_init(BlockDriverState **hd_table) |
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| 1582 |
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
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| 1583 | 1583 |
{
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| 1584 | 1584 |
PCIIDEState *d; |
| 1585 | 1585 |
uint8_t *pci_conf; |
| 1586 | 1586 |
int i; |
| 1587 | 1587 |
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d = (PCIIDEState *)pci_register_device("IDE", sizeof(PCIIDEState),
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0, -1,
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d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
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-1, |
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NULL, NULL); |
| 1591 | 1591 |
pci_conf = d->dev.config; |
| 1592 | 1592 |
pci_conf[0x00] = 0x86; // Intel |
| ... | ... | |
| 1621 | 1621 |
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| 1622 | 1622 |
/* hd_table must contain 4 block drivers */ |
| 1623 | 1623 |
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */ |
| 1624 |
void pci_piix3_ide_init(BlockDriverState **hd_table) |
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void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
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{
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PCIIDEState *d; |
| 1627 | 1627 |
uint8_t *pci_conf; |
| 1628 | 1628 |
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| 1629 | 1629 |
/* register a function 1 of PIIX3 */ |
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d = (PCIIDEState *)pci_register_device("PIIX3 IDE", sizeof(PCIIDEState),
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0, ((PCIDevice *)piix3_state)->devfn + 1, |
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d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE", |
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sizeof(PCIIDEState), |
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((PCIDevice *)piix3_state)->devfn + 1, |
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NULL, NULL); |
| 1633 | 1634 |
pci_conf = d->dev.config; |
| 1634 | 1635 |
pci_conf[0x00] = 0x86; // Intel |
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