Revision 47ad35f1 target-sparc/cpu.h

b/target-sparc/cpu.h
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#define FSR_FTT2   (1ULL << 16)
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#define FSR_FTT1   (1ULL << 15)
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#define FSR_FTT0   (1ULL << 14)
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#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0)
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//gcc warns about constant overflow for ~FSR_FTT_MASK
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//#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0)
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#ifdef TARGET_SPARC64
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#define FSR_FTT_NMASK      0xfffffffffffe3fffULL
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#define FSR_FTT_CEXC_NMASK 0xfffffffffffe3fe0ULL
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#else
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#define FSR_FTT_NMASK      0xfffe3fffULL
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#define FSR_FTT_CEXC_NMASK 0xfffe3fe0ULL
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#endif
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#define FSR_FTT_IEEE_EXCP (1ULL << 14)
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#define FSR_FTT_UNIMPFPOP (3ULL << 14)
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#define FSR_FTT_SEQ_ERROR (4ULL << 14)

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