Revision 47de922d

b/hw/sparc32_dma.c
142 142 
    DPRINTF("DMA read, direction: %c, addr 0x%8.8x\n",
143 143 
            s->dmaregs[0] & DMA_WRITE_MEM ? 'w': 'r', s->dmaregs[1]);
144 144 
    sparc_iommu_memory_read(s->iommu, s->dmaregs[1], buf, len);
145 
    DPRINTF("Raise IRQ\n");
146 145 
    s->dmaregs[0] |= DMA_INTR;
147 146 
    s->dmaregs[1] += len;
148 147 
}
......
154 153 
    DPRINTF("DMA write, direction: %c, addr 0x%8.8x\n",
155 154 
            s->dmaregs[0] & DMA_WRITE_MEM ? 'w': 'r', s->dmaregs[1]);
156 155 
    sparc_iommu_memory_write(s->iommu, s->dmaregs[1], buf, len);
157 
    DPRINTF("Raise IRQ\n");
158 156 
    s->dmaregs[0] |= DMA_INTR;
159 157 
    s->dmaregs[1] += len;
160 158 
}

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