Revision 492b2391

b/target-mips/translate.c
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                rn, reg, sel);
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    }
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#endif
5191 
    tcg_temp_free(t0);
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    /* For simplicity assume that all writes can cause interrupts.  */
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    if (use_icount) {
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        gen_io_end();
......
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    return;
5198 5197 

  		





  5199
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die:


  		





  5200
  
  
    
    tcg_temp_free(t0);


  		





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#if defined MIPS_DEBUG_DISAS


  		





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    if (loglevel & CPU_LOG_TB_IN_ASM) {


  		





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        fprintf(logfile, "dmtc0 %s (reg %d sel %d)\n",


  		












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