Revision 49a2942d hw/ppce500_mpc8544ds.c

b/hw/ppce500_mpc8544ds.c
176 176
    int i=0;
177 177
    unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
178 178
    qemu_irq *irqs, *mpic, *pci_irqs;
179
    SerialState * serial[2];
180 179

  
181 180
    /* Setup CPU */
182 181
    env = cpu_ppc_init("e500v2_v30");
......
200 199

  
201 200
    /* Serial */
202 201
    if (serial_hds[0]) {
203
        serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
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                                   0, mpic[12+26], 399193,
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                                   serial_hds[0], 1, 1);
202
        serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
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                       0, mpic[12+26], 399193,
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                       serial_hds[0], 1, 1);
206 205
    }
207 206

  
208 207
    if (serial_hds[1]) {
209
        serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
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                                   0, mpic[12+26], 399193,
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                                   serial_hds[0], 1, 1);
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        serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
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                       0, mpic[12+26], 399193,
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                       serial_hds[0], 1, 1);
212 211
    }
213 212

  
214 213
    /* PCI */

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