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# Date Author Comment
d7209371 01/14/2010 01:14 am Amit Shah

x86: translate.c: remove dead assignment

clang-analyzer points out a redundant assignment.

Signed-off-by: Amit Shah <>
Signed-off-by: Anthony Liguori <>

99596385 01/03/2010 04:14 am Aurelien Jarno

target-i386: Fix "call im" on x86_64 when executing 32-bit code

Similarly to what is done in 32938e127f50a40844a0fb9c5abb8691aeeccf7e
for "jmp im", trunc the immediate to 32-bit when not running in 64-bit
mode.

Reported-by: Kevin O'Connor <>...

31501a71 10/23/2009 06:10 pm Andre Przywara

target-i386: implement lzcnt emulation

lzcnt is a AMD Phenom/Barcelona added instruction returning the
number of leading zero bits in a word.
As this is similar to the "bsr" instruction, reuse the existing
code. There need to be some more changes, though, as lzcnt always...

49d9fdcc 10/06/2009 11:01 pm Laurent Desnogues

target-i386: fix ARPL

The arpl implementation in target-i386/translate.c uses cpu_A0
temporary across a brcond op. This patch fixes that issue.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>

09d85fb8 10/05/2009 12:10 am Kevin Wolf

target-i386: Fix exceptions for fxsave/fxrstor

This patch corrects the following aspects of exception generation in
fxsave/fxrstor:

  • Generate #GP if the operand is not aligned to a 16 byte boundary
  • Generate #UD if the LOCK prefix is used
  • For CR0.EM = 1 #NM is generated, not #UD...
1b050077 10/04/2009 03:46 pm Andre Przywara

target-i386: add RDTSCP support

RDTSCP reads the time stamp counter and atomically also the content
of a 32-bit MSR, which can be freely set by the OS. This allows CPU
local data to be queried by userspace.
Linux uses this to allow a fast implementation of the getcpu()...

d9f4bb27 10/04/2009 03:09 pm Andre Przywara

target-i386: add SSE4a instruction support

This adds support for the AMD Phenom/Barcelona's SSE4a instructions.
Those include insertq and extrq, which are doing shift and mask on
XMM registers, in two versions (immediate shift/length values and
stored in another XMM register)....

ccd59d09 10/04/2009 03:04 pm Andre Przywara

target-i386: add lock mov cr0 = cr8

AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode.
If you use the LOCK prefix with "mov CR0", it accesses CR8 instead.
This behavior is guarded by the CR8_LEGACY CPUID bit
(Fn8000_0001:ECX1).

Signed-off-by: Andre Przywara <>...

cc739bb0 09/30/2009 11:53 pm Laurent Desnogues

x86: use globals for CPU registers

Use globals for the 8 or 16 CPU registers on i386 and x86_64.

Signed-off-by: Aurelien Jarno <>

bedda79c 09/27/2009 01:57 am Aurelien Jarno

target-i386: kill a tmp register

Signed-off-by: Aurelien Jarno <>

5b207c00 09/27/2009 01:57 am Aurelien Jarno

target-i386: use subfi instead of sub with a non-freed constant

Signed-off-by: Aurelien Jarno <>

72cf2d4f 09/12/2009 10:36 am Blue Swirl

Fix sys-queue.h conflict for good

Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...

e2542fe2 07/27/2009 10:09 pm Juan Quintela

rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

a2397807 05/22/2009 06:50 pm Jan Kiszka

x86: Add support for resume flag

Signed-off-by: Jan Kiszka <>

55616505 05/13/2009 10:54 pm Paul Brook

Include assert.h from qemu-common.h

Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks

Signed-off-by: Paul Brook <>

001faf32 05/13/2009 08:53 pm Blue Swirl

Replace gcc variadic macro extension with C99 version

Signed-off-by: Blue Swirl <>

1b530a6d 04/05/2009 11:08 pm aurel32

Add new command line option -singlestep for tcg single stepping.

This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode....

8cd6345d 04/03/2009 01:54 am malc

Immediate versions of ro[lr]

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6968 c046a42c-6fe2-441c-8c8c-71466251a162

8777643e 03/13/2009 11:35 am aurel32

target-i386: use the new bswap* TCG ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6836 c046a42c-6fe2-441c-8c8c-71466251a162

66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162

8fec2b8c 01/16/2009 12:36 am aliguori

global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)

These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

93fcfe39 01/16/2009 12:34 am aliguori

Convert references to logfile/loglevel to use qemu_log*() macros

This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

fad6cb1a 01/05/2009 12:05 am aurel32

Update FSF address in GPL/LGPL boilerplate

The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <>
Signed-off-by: Aurelien Jarno <>...

f60d2728 12/13/2008 05:51 pm malc

Fix smsw for x86_64 guest and bigendian host case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6009 c046a42c-6fe2-441c-8c8c-71466251a162

32938e12 12/10/2008 05:02 pm aurel32

target-i386: Fix jmp im on x86_64 when executing 32-bit code

When running grub-install (32-bit) on an x86_64 Linux system in qemu, it
hangs on a pagefault forever, because an integer overflow occurs on the
IP on "jmp im". This patch masks overflows for 32 bit IPs on a 64 bit...

0b97134b 12/07/2008 08:15 pm aurel32

target-i386: fix CVE-2007-1322

The icebp instruction can be abused to terminate the emulation,
resulting in denial of service.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5921 c046a42c-6fe2-441c-8c8c-71466251a162

c0ce998e 11/26/2008 12:13 am aliguori

Use sys-queue.h for break/watchpoint managment (Jan Kiszka)

This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <>...

a1d1bb31 11/18/2008 10:07 pm aliguori

Refactor and enhance break/watchpoint API (Jan Kiszka)

This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists....

a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162

000cacf6 10/04/2008 02:33 pm balrog

Fix crc32w decoding, fix a constant width in blendvpd.

Forced the constant's width to long long so that it doesn't overflow,
problem spotted by C. W. Betts.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5417 c046a42c-6fe2-441c-8c8c-71466251a162

fdb0d09d 10/04/2008 06:32 am balrog

x86 "popcnt" affects flags.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5412 c046a42c-6fe2-441c-8c8c-71466251a162

222a3336 10/04/2008 06:27 am balrog

Implement SSE4.1, SSE4.2 (x86).

This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNT
extensions. Most instructions haven't been tested yet.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162

6dc2d0da 10/01/2008 03:14 am balrog

x86 pextrw destination operand can be r64.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162

2436b61a 09/25/2008 09:16 pm balrog

SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).

On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.

Signed-off-by: Alexander Graf <>...

4242b1bd 09/25/2008 09:01 pm balrog

Implement x86 SSSE3 instructions.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5315 c046a42c-6fe2-441c-8c8c-71466251a162

2cfc5f17 07/18/2008 09:01 pm ths

Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162

28e10711 07/07/2008 11:25 pm bellard

fix cvtsq2s[sd] (Juergen Lock)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4856 c046a42c-6fe2-441c-8c8c-71466251a162

d70040bc 07/05/2008 08:03 pm pbrook

Re-add static qualifier. Fix annother occurance of "const static".

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4850 c046a42c-6fe2-441c-8c8c-71466251a162

efade670 06/30/2008 08:51 pm pbrook

Fix rdtsc instruction counting.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4810 c046a42c-6fe2-441c-8c8c-71466251a162

2e70f6ef 06/29/2008 04:03 am pbrook

Add instruction counter.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162

94451178 06/18/2008 12:32 pm bellard

HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4746 c046a42c-6fe2-441c-8c8c-71466251a162

ec9d6075 06/06/2008 03:54 pm bellard

undocumented 0x82 opcode is invalid in 64 bit code

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4687 c046a42c-6fe2-441c-8c8c-71466251a162

9575cb94 06/04/2008 08:12 pm bellard

fixed exceptions for cpuid and invlpg

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4664 c046a42c-6fe2-441c-8c8c-71466251a162

db620f46 06/04/2008 08:02 pm bellard

reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162

914178d3 06/04/2008 04:53 pm bellard

32 bit SVM fixes - INVLPG and INVLPGA updates

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4660 c046a42c-6fe2-441c-8c8c-71466251a162

872929aa 05/28/2008 07:16 pm bellard

SVM rework

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162

2a449d14 05/26/2008 12:01 am bellard

fixed x86_64 regression

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4586 c046a42c-6fe2-441c-8c8c-71466251a162

1e4840bf 05/25/2008 08:26 pm bellard

transformed TN into temporaries - add local temporaries usage when needed - optimized fcmovX

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4577 c046a42c-6fe2-441c-8c8c-71466251a162

cb63669a 05/24/2008 05:22 am pbrook

Fix ARM conditional branch bug.
Add tcg_gen_brcondi.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162

70cff25e 05/22/2008 08:00 pm bellard

use debug_insn_start to have nicer debug traces

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4532 c046a42c-6fe2-441c-8c8c-71466251a162

437a88a5 05/22/2008 07:11 pm bellard

proper helper definition registering (all targets must do that)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4530 c046a42c-6fe2-441c-8c8c-71466251a162

c1c37968 05/22/2008 03:36 pm bellard

optimization of shifts by a constant

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4524 c046a42c-6fe2-441c-8c8c-71466251a162

12e26b75 05/22/2008 01:13 pm bellard

lahf/sahf cpuid test

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162

1b9d9ebb 05/22/2008 12:52 pm bellard

cmpxchg8b fix - added cmpxchg16b

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4522 c046a42c-6fe2-441c-8c8c-71466251a162

1130328e 05/22/2008 12:36 pm bellard

cmpxchg 64 bit fix

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4521 c046a42c-6fe2-441c-8c8c-71466251a162

8e1c85e3 05/21/2008 10:16 pm bellard

converted conditional jumps, SET and CMOVx to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4518 c046a42c-6fe2-441c-8c8c-71466251a162

651ba608 05/21/2008 08:16 pm bellard

converted env access to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4516 c046a42c-6fe2-441c-8c8c-71466251a162

bd7a7b33 05/21/2008 08:07 pm bellard

convert eflags manipulation insns to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162

3bd7da9e 05/21/2008 07:34 pm bellard

convert remaining segment handling to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4514 c046a42c-6fe2-441c-8c8c-71466251a162

cec6843e 05/21/2008 07:25 pm bellard

converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162

839bca84 05/21/2008 04:34 pm bellard

suppressed no longer used ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4511 c046a42c-6fe2-441c-8c8c-71466251a162

07be379f 05/21/2008 04:29 pm bellard

converted INTO/CMPXCHG8B to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162

9d0763c4 05/21/2008 04:24 pm bellard

converted BCD ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4509 c046a42c-6fe2-441c-8c8c-71466251a162

0211e5af 05/21/2008 01:12 pm bellard

converted MUL/IMUL to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162

6e0d8677 05/18/2008 10:28 pm bellard

converted string OPs and LOOP insns to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4494 c046a42c-6fe2-441c-8c8c-71466251a162

cd31fefa 05/18/2008 10:19 pm bellard

fixed INC/DEC condition codes

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4493 c046a42c-6fe2-441c-8c8c-71466251a162

e108dd01 05/17/2008 10:24 pm bellard

converted sign extension ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4481 c046a42c-6fe2-441c-8c8c-71466251a162

bbf662ee 05/17/2008 10:05 pm bellard

MONITOR insn address generation fix - converted XLAT to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4479 c046a42c-6fe2-441c-8c8c-71466251a162

6191b059 05/17/2008 09:44 pm bellard

BSR/BSF TCG conversion

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162

f484d386 05/17/2008 07:10 pm bellard

converted bit test operations to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4473 c046a42c-6fe2-441c-8c8c-71466251a162

cad3a37d 05/17/2008 04:50 pm bellard

converted adc, sbb, cmpxchg to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4471 c046a42c-6fe2-441c-8c8c-71466251a162

b6abf97d 05/17/2008 03:44 pm bellard

converted condition code supprot to TCG - converted shift ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162

b8b6a50b 05/15/2008 07:46 pm bellard

converted more helpers to TCG - fixed some SVM issues

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162

3bd8c5e4 05/13/2008 01:55 am bellard

compilation fix

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4449 c046a42c-6fe2-441c-8c8c-71466251a162

b5b38f61 05/13/2008 01:05 am bellard

converted more helpers to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4447 c046a42c-6fe2-441c-8c8c-71466251a162

ba7cd150 05/12/2008 11:30 pm bellard

FPU fixes

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4445 c046a42c-6fe2-441c-8c8c-71466251a162

19e6c4b8 05/12/2008 10:10 pm bellard

converted x87 FPU ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4444 c046a42c-6fe2-441c-8c8c-71466251a162

5af45186 05/12/2008 07:47 pm bellard

converted SSE/MMX ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4441 c046a42c-6fe2-441c-8c8c-71466251a162

8686c490 05/12/2008 04:55 pm bellard

use TCG for MMX/SSE memory accesses

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4439 c046a42c-6fe2-441c-8c8c-71466251a162

d2856f1a 04/28/2008 03:32 am aurel32

Factorize code in translate.c

(Glauber Costa)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162

e771edab 04/09/2008 09:41 am aurel32

Check for 3DNow! CPUID at translation time

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4184 c046a42c-6fe2-441c-8c8c-71466251a162

a35f3ec7 04/08/2008 10:51 pm aurel32

3DNow! instruction set emulation

(Michael Tross)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4180 c046a42c-6fe2-441c-8c8c-71466251a162

f8422f52 02/24/2008 09:45 am blueswir1

More helper types, rearrange generic definitions

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3988 c046a42c-6fe2-441c-8c8c-71466251a162

ac56dd48 02/03/2008 09:56 pm pbrook

Add TCG variable opaque type.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3961 c046a42c-6fe2-441c-8c8c-71466251a162

57fec1fe 02/01/2008 12:50 pm bellard

use the TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162

71c3558e 12/24/2007 03:29 pm balrog

Fix cmpxchg8b translation (Bernhard Kauer).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3843 c046a42c-6fe2-441c-8c8c-71466251a162

df01e0fc 12/10/2007 01:35 am balrog

Add rdpmc SVM intercept, by Bernhard Kauer.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3791 c046a42c-6fe2-441c-8c8c-71466251a162

ec6338ba 11/08/2007 04:25 pm bellard

removed obsolete x86 code copy support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3551 c046a42c-6fe2-441c-8c8c-71466251a162

ad848875 10/31/2007 04:01 am balrog

Correct the WBINVD intercept in SVM (Alexander Graf).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3499 c046a42c-6fe2-441c-8c8c-71466251a162

52621688 09/27/2007 04:52 am ths

SVM VINTR fix, by Alexander Graf.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3248 c046a42c-6fe2-441c-8c8c-71466251a162

0573fbfc 09/23/2007 06:28 pm ths

SVM Support, by Alexander Graf.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3210 c046a42c-6fe2-441c-8c8c-71466251a162

c068688b 09/21/2007 01:47 am j_mayer

Extend TB flags to 64 bits (Alexander Graf).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162

3b46e624 09/17/2007 11:09 am ths

find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162

5fafdf24 09/17/2007 12:08 am ths

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162

88fe8a41 06/26/2007 11:35 am ths

DR6 single step exception status bit, by Juergen Keil.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3024 c046a42c-6fe2-441c-8c8c-71466251a162

b6d7c3db 06/23/2007 09:21 pm ths

Fix division by zero handling, by Joris van Rantwijk.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3012 c046a42c-6fe2-441c-8c8c-71466251a162

e91c8a77 06/03/2007 04:35 pm ths

Spelling fixes, by Stefan Weil.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2927 c046a42c-6fe2-441c-8c8c-71466251a162

7f75ffd3 05/27/2007 10:39 pm blueswir1

Spelling fix (Mark Glines)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2879 c046a42c-6fe2-441c-8c8c-71466251a162

2f6ecc62 04/27/2007 03:01 am ths

Workaround qemu guest SIGSEGVs with cmpxchg8b insn, by Juergen Keil.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2732 c046a42c-6fe2-441c-8c8c-71466251a162