Revision 49a945a3

b/cpu-exec.c
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void cpu_loop_exit(void)
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{
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    /* NOTE: the register at this point must be saved by hand because
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       longjmp restore them */
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    regs_to_env();
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    longjmp(env->jmp_env, 1);
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}
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......
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    tb_invalidated_flag = 0;
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    regs_to_env(); /* XXX: do it just before cpu_gen_code() */
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    /* find translated block using physical mappings */
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    phys_pc = get_phys_addr_code(env, pc);
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    phys_page1 = phys_pc & TARGET_PAGE_MASK;
......
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#include "hostregs_helper.h"
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    env = env1;
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    env_to_regs();
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#if defined(TARGET_I386)
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    /* put eflags in CPU temporary format */
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    CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
......
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#ifdef CONFIG_DEBUG_EXEC
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                if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
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                    /* restore flags in standard format */
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                    regs_to_env();
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#if defined(TARGET_I386)
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                    env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
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                    log_cpu_state(env, X86_DUMP_CCOP);
......
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                /* reset soft MMU for next block (it can currently
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                   only be set by a memory fault) */
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            } /* for(;;) */
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        } else {
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            env_to_regs();
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        }
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    } /* for(;;) */
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b/target-alpha/exec.h
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#include "softmmu_exec.h"
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#endif /* !defined(CONFIG_USER_ONLY) */
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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static inline int cpu_has_work(CPUState *env)
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{
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    return (env->interrupt_request & CPU_INTERRUPT_HARD);
b/target-arm/exec.h
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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static inline int cpu_has_work(CPUState *env)
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{
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    return (env->interrupt_request &
b/target-cris/exec.h
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#endif
b/target-i386/exec.h
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        (eflags & update_mask) | 0x2;
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}
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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static inline int cpu_has_work(CPUState *env)
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{
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    int work;
b/target-m68k/exec.h
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#endif
b/target-microblaze/exec.h
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#endif
b/target-mips/exec.h
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void cpu_mips_clock_init (CPUState *env);
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void cpu_mips_tlb_flush (CPUState *env, int flush_global);
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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static inline int cpu_has_work(CPUState *env)
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{
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    return (env->interrupt_request &
b/target-ppc/exec.h
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#include "softmmu_exec.h"
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#endif /* !defined(CONFIG_USER_ONLY) */
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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static inline int cpu_has_work(CPUState *env)
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{
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    return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD));
b/target-s390x/exec.h
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    return env->interrupt_request & CPU_INTERRUPT_HARD; // guess
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}
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static inline void regs_to_env(void)
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{
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}
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static inline void env_to_regs(void)
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{
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}
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static inline int cpu_halted(CPUState *env)
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{
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    if (!env->halted) {
b/target-sh4/exec.h
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#include "softmmu_exec.h"
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#endif
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static inline void regs_to_env(void)
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{
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    /* XXXXX */
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}
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static inline void env_to_regs(void)
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{
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    /* XXXXX */
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}
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#endif				/* _EXEC_SH4_H */
b/target-sparc/exec.h
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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/* op_helper.c */
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void do_interrupt(CPUState *env);
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