root / hw / block / m25p80.c @ 49ab747f
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/*
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* ST M25P80 emulator. Emulate all SPI flash devices based on the m25p80 command
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* set. Known devices table current as of Jun/2012 and taken from linux.
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* See drivers/mtd/devices/m25p80.c.
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*
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* Copyright (C) 2011 Edgar E. Iglesias <edgar.iglesias@gmail.com>
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* Copyright (C) 2012 Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
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* Copyright (C) 2012 PetaLogix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) a later version of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/hw.h" |
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#include "sysemu/blockdev.h" |
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#include "hw/ssi.h" |
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#include "hw/arm/devices.h" |
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#ifdef M25P80_ERR_DEBUG
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#define DB_PRINT(...) do { \ |
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fprintf(stderr, ": %s: ", __func__); \
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fprintf(stderr, ## __VA_ARGS__); \ |
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} while (0); |
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#else
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#define DB_PRINT(...)
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#endif
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/* Fields for FlashPartInfo->flags */
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|
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/* erase capabilities */
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#define ER_4K 1 |
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#define ER_32K 2 |
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/* set to allow the page program command to write 0s back to 1. Useful for
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* modelling EEPROM with SPI flash command set
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*/
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#define WR_1 0x100 |
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typedef struct FlashPartInfo { |
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const char *part_name; |
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/* jedec code. (jedec >> 16) & 0xff is the 1st byte, >> 8 the 2nd etc */
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uint32_t jedec; |
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/* extended jedec code */
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uint16_t ext_jedec; |
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/* there is confusion between manufacturers as to what a sector is. In this
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* device model, a "sector" is the size that is erased by the ERASE_SECTOR
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* command (opcode 0xd8).
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*/
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uint32_t sector_size; |
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uint32_t n_sectors; |
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uint32_t page_size; |
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uint8_t flags; |
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} FlashPartInfo; |
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|
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/* adapted from linux */
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#define INFO(_part_name, _jedec, _ext_jedec, _sector_size, _n_sectors, _flags)\
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.part_name = (_part_name),\ |
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.jedec = (_jedec),\ |
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.ext_jedec = (_ext_jedec),\ |
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.sector_size = (_sector_size),\ |
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.n_sectors = (_n_sectors),\ |
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.page_size = 256,\
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.flags = (_flags),\ |
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#define JEDEC_NUMONYX 0x20 |
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#define JEDEC_WINBOND 0xEF |
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#define JEDEC_SPANSION 0x01 |
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static const FlashPartInfo known_devices[] = { |
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/* Atmel -- some are (confusingly) marketed as "DataFlash" */
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{ INFO("at25fs010", 0x1f6601, 0, 32 << 10, 4, ER_4K) }, |
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{ INFO("at25fs040", 0x1f6604, 0, 64 << 10, 8, ER_4K) }, |
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{ INFO("at25df041a", 0x1f4401, 0, 64 << 10, 8, ER_4K) }, |
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{ INFO("at25df321a", 0x1f4701, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("at25df641", 0x1f4800, 0, 64 << 10, 128, ER_4K) }, |
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{ INFO("at26f004", 0x1f0400, 0, 64 << 10, 8, ER_4K) }, |
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{ INFO("at26df081a", 0x1f4501, 0, 64 << 10, 16, ER_4K) }, |
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{ INFO("at26df161a", 0x1f4601, 0, 64 << 10, 32, ER_4K) }, |
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{ INFO("at26df321", 0x1f4700, 0, 64 << 10, 64, ER_4K) }, |
92 |
|
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/* EON -- en25xxx */
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{ INFO("en25f32", 0x1c3116, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("en25p32", 0x1c2016, 0, 64 << 10, 64, 0) }, |
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{ INFO("en25q32b", 0x1c3016, 0, 64 << 10, 64, 0) }, |
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{ INFO("en25p64", 0x1c2017, 0, 64 << 10, 128, 0) }, |
98 |
|
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/* Intel/Numonyx -- xxxs33b */
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{ INFO("160s33b", 0x898911, 0, 64 << 10, 32, 0) }, |
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{ INFO("320s33b", 0x898912, 0, 64 << 10, 64, 0) }, |
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{ INFO("640s33b", 0x898913, 0, 64 << 10, 128, 0) }, |
103 |
|
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/* Macronix */
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{ INFO("mx25l4005a", 0xc22013, 0, 64 << 10, 8, ER_4K) }, |
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{ INFO("mx25l8005", 0xc22014, 0, 64 << 10, 16, 0) }, |
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{ INFO("mx25l1606e", 0xc22015, 0, 64 << 10, 32, ER_4K) }, |
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{ INFO("mx25l3205d", 0xc22016, 0, 64 << 10, 64, 0) }, |
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{ INFO("mx25l6405d", 0xc22017, 0, 64 << 10, 128, 0) }, |
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{ INFO("mx25l12805d", 0xc22018, 0, 64 << 10, 256, 0) }, |
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{ INFO("mx25l12855e", 0xc22618, 0, 64 << 10, 256, 0) }, |
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{ INFO("mx25l25635e", 0xc22019, 0, 64 << 10, 512, 0) }, |
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{ INFO("mx25l25655e", 0xc22619, 0, 64 << 10, 512, 0) }, |
114 |
|
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/* Spansion -- single (large) sector size only, at least
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* for the chips listed here (without boot sectors).
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*/
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{ INFO("s25sl004a", 0x010212, 0, 64 << 10, 8, 0) }, |
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{ INFO("s25sl008a", 0x010213, 0, 64 << 10, 16, 0) }, |
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{ INFO("s25sl016a", 0x010214, 0, 64 << 10, 32, 0) }, |
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{ INFO("s25sl032a", 0x010215, 0, 64 << 10, 64, 0) }, |
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{ INFO("s25sl032p", 0x010215, 0x4d00, 64 << 10, 64, ER_4K) }, |
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{ INFO("s25sl064a", 0x010216, 0, 64 << 10, 128, 0) }, |
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{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 << 10, 128, 0) }, |
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{ INFO("s25fl256s1", 0x010219, 0x4d01, 64 << 10, 512, 0) }, |
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{ INFO("s25fl512s", 0x010220, 0x4d00, 256 << 10, 256, 0) }, |
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{ INFO("s70fl01gs", 0x010221, 0x4d00, 256 << 10, 256, 0) }, |
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{ INFO("s25sl12800", 0x012018, 0x0300, 256 << 10, 64, 0) }, |
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{ INFO("s25sl12801", 0x012018, 0x0301, 64 << 10, 256, 0) }, |
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{ INFO("s25fl129p0", 0x012018, 0x4d00, 256 << 10, 64, 0) }, |
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{ INFO("s25fl129p1", 0x012018, 0x4d01, 64 << 10, 256, 0) }, |
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{ INFO("s25fl016k", 0xef4015, 0, 64 << 10, 32, ER_4K | ER_32K) }, |
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{ INFO("s25fl064k", 0xef4017, 0, 64 << 10, 128, ER_4K | ER_32K) }, |
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|
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/* SST -- large erase sizes are "overlays", "sectors" are 4<< 10 */
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{ INFO("sst25vf040b", 0xbf258d, 0, 64 << 10, 8, ER_4K) }, |
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{ INFO("sst25vf080b", 0xbf258e, 0, 64 << 10, 16, ER_4K) }, |
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{ INFO("sst25vf016b", 0xbf2541, 0, 64 << 10, 32, ER_4K) }, |
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{ INFO("sst25vf032b", 0xbf254a, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("sst25wf512", 0xbf2501, 0, 64 << 10, 1, ER_4K) }, |
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{ INFO("sst25wf010", 0xbf2502, 0, 64 << 10, 2, ER_4K) }, |
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{ INFO("sst25wf020", 0xbf2503, 0, 64 << 10, 4, ER_4K) }, |
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{ INFO("sst25wf040", 0xbf2504, 0, 64 << 10, 8, ER_4K) }, |
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/* ST Microelectronics -- newer production may have feature updates */
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{ INFO("m25p05", 0x202010, 0, 32 << 10, 2, 0) }, |
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{ INFO("m25p10", 0x202011, 0, 32 << 10, 4, 0) }, |
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{ INFO("m25p20", 0x202012, 0, 64 << 10, 4, 0) }, |
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{ INFO("m25p40", 0x202013, 0, 64 << 10, 8, 0) }, |
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{ INFO("m25p80", 0x202014, 0, 64 << 10, 16, 0) }, |
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{ INFO("m25p16", 0x202015, 0, 64 << 10, 32, 0) }, |
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{ INFO("m25p32", 0x202016, 0, 64 << 10, 64, 0) }, |
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{ INFO("m25p64", 0x202017, 0, 64 << 10, 128, 0) }, |
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{ INFO("m25p128", 0x202018, 0, 256 << 10, 64, 0) }, |
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|
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{ INFO("m45pe10", 0x204011, 0, 64 << 10, 2, 0) }, |
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{ INFO("m45pe80", 0x204014, 0, 64 << 10, 16, 0) }, |
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{ INFO("m45pe16", 0x204015, 0, 64 << 10, 32, 0) }, |
159 |
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{ INFO("m25pe80", 0x208014, 0, 64 << 10, 16, 0) }, |
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{ INFO("m25pe16", 0x208015, 0, 64 << 10, 32, ER_4K) }, |
162 |
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{ INFO("m25px32", 0x207116, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("m25px32-s0", 0x207316, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("m25px32-s1", 0x206316, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("m25px64", 0x207117, 0, 64 << 10, 128, 0) }, |
167 |
|
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/* Winbond -- w25x "blocks" are 64k, "sectors" are 4KiB */
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{ INFO("w25x10", 0xef3011, 0, 64 << 10, 2, ER_4K) }, |
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{ INFO("w25x20", 0xef3012, 0, 64 << 10, 4, ER_4K) }, |
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{ INFO("w25x40", 0xef3013, 0, 64 << 10, 8, ER_4K) }, |
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{ INFO("w25x80", 0xef3014, 0, 64 << 10, 16, ER_4K) }, |
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{ INFO("w25x16", 0xef3015, 0, 64 << 10, 32, ER_4K) }, |
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{ INFO("w25x32", 0xef3016, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("w25q32", 0xef4016, 0, 64 << 10, 64, ER_4K) }, |
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{ INFO("w25x64", 0xef3017, 0, 64 << 10, 128, ER_4K) }, |
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{ INFO("w25q64", 0xef4017, 0, 64 << 10, 128, ER_4K) }, |
178 |
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/* Numonyx -- n25q128 */
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{ INFO("n25q128", 0x20ba18, 0, 64 << 10, 256, 0) }, |
181 |
}; |
182 |
|
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typedef enum { |
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NOP = 0,
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WRSR = 0x1,
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WRDI = 0x4,
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RDSR = 0x5,
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WREN = 0x6,
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JEDEC_READ = 0x9f,
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BULK_ERASE = 0xc7,
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READ = 0x3,
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FAST_READ = 0xb,
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DOR = 0x3b,
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QOR = 0x6b,
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DIOR = 0xbb,
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QIOR = 0xeb,
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PP = 0x2,
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DPP = 0xa2,
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QPP = 0x32,
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ERASE_4K = 0x20,
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ERASE_32K = 0x52,
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ERASE_SECTOR = 0xd8,
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} FlashCMD; |
207 |
|
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typedef enum { |
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STATE_IDLE, |
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STATE_PAGE_PROGRAM, |
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STATE_READ, |
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STATE_COLLECTING_DATA, |
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STATE_READING_DATA, |
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} CMDState; |
215 |
|
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typedef struct Flash { |
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SSISlave ssidev; |
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uint32_t r; |
219 |
|
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BlockDriverState *bdrv; |
221 |
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uint8_t *storage; |
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uint32_t size; |
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int page_size;
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|
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uint8_t state; |
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uint8_t data[16];
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uint32_t len; |
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uint32_t pos; |
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uint8_t needed_bytes; |
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uint8_t cmd_in_progress; |
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uint64_t cur_addr; |
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bool write_enable;
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|
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int64_t dirty_page; |
236 |
|
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const FlashPartInfo *pi;
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|
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} Flash; |
240 |
|
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typedef struct M25P80Class { |
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SSISlaveClass parent_class; |
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FlashPartInfo *pi; |
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} M25P80Class; |
245 |
|
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#define TYPE_M25P80 "m25p80-generic" |
247 |
#define M25P80(obj) \
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OBJECT_CHECK(Flash, (obj), TYPE_M25P80) |
249 |
#define M25P80_CLASS(klass) \
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OBJECT_CLASS_CHECK(M25P80Class, (klass), TYPE_M25P80) |
251 |
#define M25P80_GET_CLASS(obj) \
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OBJECT_GET_CLASS(M25P80Class, (obj), TYPE_M25P80) |
253 |
|
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static void bdrv_sync_complete(void *opaque, int ret) |
255 |
{ |
256 |
/* do nothing. Masters do not directly interact with the backing store,
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* only the working copy so no mutexing required.
|
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*/
|
259 |
} |
260 |
|
261 |
static void flash_sync_page(Flash *s, int page) |
262 |
{ |
263 |
if (s->bdrv) {
|
264 |
int bdrv_sector, nb_sectors;
|
265 |
QEMUIOVector iov; |
266 |
|
267 |
bdrv_sector = (page * s->pi->page_size) / BDRV_SECTOR_SIZE; |
268 |
nb_sectors = DIV_ROUND_UP(s->pi->page_size, BDRV_SECTOR_SIZE); |
269 |
qemu_iovec_init(&iov, 1);
|
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qemu_iovec_add(&iov, s->storage + bdrv_sector * BDRV_SECTOR_SIZE, |
271 |
nb_sectors * BDRV_SECTOR_SIZE); |
272 |
bdrv_aio_writev(s->bdrv, bdrv_sector, &iov, nb_sectors, |
273 |
bdrv_sync_complete, NULL);
|
274 |
} |
275 |
} |
276 |
|
277 |
static inline void flash_sync_area(Flash *s, int64_t off, int64_t len) |
278 |
{ |
279 |
int64_t start, end, nb_sectors; |
280 |
QEMUIOVector iov; |
281 |
|
282 |
if (!s->bdrv) {
|
283 |
return;
|
284 |
} |
285 |
|
286 |
assert(!(len % BDRV_SECTOR_SIZE)); |
287 |
start = off / BDRV_SECTOR_SIZE; |
288 |
end = (off + len) / BDRV_SECTOR_SIZE; |
289 |
nb_sectors = end - start; |
290 |
qemu_iovec_init(&iov, 1);
|
291 |
qemu_iovec_add(&iov, s->storage + (start * BDRV_SECTOR_SIZE), |
292 |
nb_sectors * BDRV_SECTOR_SIZE); |
293 |
bdrv_aio_writev(s->bdrv, start, &iov, nb_sectors, bdrv_sync_complete, NULL);
|
294 |
} |
295 |
|
296 |
static void flash_erase(Flash *s, int offset, FlashCMD cmd) |
297 |
{ |
298 |
uint32_t len; |
299 |
uint8_t capa_to_assert = 0;
|
300 |
|
301 |
switch (cmd) {
|
302 |
case ERASE_4K:
|
303 |
len = 4 << 10; |
304 |
capa_to_assert = ER_4K; |
305 |
break;
|
306 |
case ERASE_32K:
|
307 |
len = 32 << 10; |
308 |
capa_to_assert = ER_32K; |
309 |
break;
|
310 |
case ERASE_SECTOR:
|
311 |
len = s->pi->sector_size; |
312 |
break;
|
313 |
case BULK_ERASE:
|
314 |
len = s->size; |
315 |
break;
|
316 |
default:
|
317 |
abort(); |
318 |
} |
319 |
|
320 |
DB_PRINT("offset = %#x, len = %d\n", offset, len);
|
321 |
if ((s->pi->flags & capa_to_assert) != capa_to_assert) {
|
322 |
hw_error("m25p80: %dk erase size not supported by device\n", len);
|
323 |
} |
324 |
|
325 |
if (!s->write_enable) {
|
326 |
DB_PRINT("erase with write protect!\n");
|
327 |
return;
|
328 |
} |
329 |
memset(s->storage + offset, 0xff, len);
|
330 |
flash_sync_area(s, offset, len); |
331 |
} |
332 |
|
333 |
static inline void flash_sync_dirty(Flash *s, int64_t newpage) |
334 |
{ |
335 |
if (s->dirty_page >= 0 && s->dirty_page != newpage) { |
336 |
flash_sync_page(s, s->dirty_page); |
337 |
s->dirty_page = newpage; |
338 |
} |
339 |
} |
340 |
|
341 |
static inline |
342 |
void flash_write8(Flash *s, uint64_t addr, uint8_t data)
|
343 |
{ |
344 |
int64_t page = addr / s->pi->page_size; |
345 |
uint8_t prev = s->storage[s->cur_addr]; |
346 |
|
347 |
if (!s->write_enable) {
|
348 |
DB_PRINT("write with write protect!\n");
|
349 |
} |
350 |
|
351 |
if ((prev ^ data) & data) {
|
352 |
DB_PRINT("programming zero to one! addr=%lx %x -> %x\n",
|
353 |
addr, prev, data); |
354 |
} |
355 |
|
356 |
if (s->pi->flags & WR_1) {
|
357 |
s->storage[s->cur_addr] = data; |
358 |
} else {
|
359 |
s->storage[s->cur_addr] &= data; |
360 |
} |
361 |
|
362 |
flash_sync_dirty(s, page); |
363 |
s->dirty_page = page; |
364 |
} |
365 |
|
366 |
static void complete_collecting_data(Flash *s) |
367 |
{ |
368 |
s->cur_addr = s->data[0] << 16; |
369 |
s->cur_addr |= s->data[1] << 8; |
370 |
s->cur_addr |= s->data[2];
|
371 |
|
372 |
s->state = STATE_IDLE; |
373 |
|
374 |
switch (s->cmd_in_progress) {
|
375 |
case DPP:
|
376 |
case QPP:
|
377 |
case PP:
|
378 |
s->state = STATE_PAGE_PROGRAM; |
379 |
break;
|
380 |
case READ:
|
381 |
case FAST_READ:
|
382 |
case DOR:
|
383 |
case QOR:
|
384 |
case DIOR:
|
385 |
case QIOR:
|
386 |
s->state = STATE_READ; |
387 |
break;
|
388 |
case ERASE_4K:
|
389 |
case ERASE_32K:
|
390 |
case ERASE_SECTOR:
|
391 |
flash_erase(s, s->cur_addr, s->cmd_in_progress); |
392 |
break;
|
393 |
case WRSR:
|
394 |
if (s->write_enable) {
|
395 |
s->write_enable = false;
|
396 |
} |
397 |
break;
|
398 |
default:
|
399 |
break;
|
400 |
} |
401 |
} |
402 |
|
403 |
static void decode_new_cmd(Flash *s, uint32_t value) |
404 |
{ |
405 |
s->cmd_in_progress = value; |
406 |
DB_PRINT("decoded new command:%x\n", value);
|
407 |
|
408 |
switch (value) {
|
409 |
|
410 |
case ERASE_4K:
|
411 |
case ERASE_32K:
|
412 |
case ERASE_SECTOR:
|
413 |
case READ:
|
414 |
case DPP:
|
415 |
case QPP:
|
416 |
case PP:
|
417 |
s->needed_bytes = 3;
|
418 |
s->pos = 0;
|
419 |
s->len = 0;
|
420 |
s->state = STATE_COLLECTING_DATA; |
421 |
break;
|
422 |
|
423 |
case FAST_READ:
|
424 |
case DOR:
|
425 |
case QOR:
|
426 |
s->needed_bytes = 4;
|
427 |
s->pos = 0;
|
428 |
s->len = 0;
|
429 |
s->state = STATE_COLLECTING_DATA; |
430 |
break;
|
431 |
|
432 |
case DIOR:
|
433 |
switch ((s->pi->jedec >> 16) & 0xFF) { |
434 |
case JEDEC_WINBOND:
|
435 |
case JEDEC_SPANSION:
|
436 |
s->needed_bytes = 4;
|
437 |
break;
|
438 |
case JEDEC_NUMONYX:
|
439 |
default:
|
440 |
s->needed_bytes = 5;
|
441 |
} |
442 |
s->pos = 0;
|
443 |
s->len = 0;
|
444 |
s->state = STATE_COLLECTING_DATA; |
445 |
break;
|
446 |
|
447 |
case QIOR:
|
448 |
switch ((s->pi->jedec >> 16) & 0xFF) { |
449 |
case JEDEC_WINBOND:
|
450 |
case JEDEC_SPANSION:
|
451 |
s->needed_bytes = 6;
|
452 |
break;
|
453 |
case JEDEC_NUMONYX:
|
454 |
default:
|
455 |
s->needed_bytes = 8;
|
456 |
} |
457 |
s->pos = 0;
|
458 |
s->len = 0;
|
459 |
s->state = STATE_COLLECTING_DATA; |
460 |
break;
|
461 |
|
462 |
case WRSR:
|
463 |
if (s->write_enable) {
|
464 |
s->needed_bytes = 1;
|
465 |
s->pos = 0;
|
466 |
s->len = 0;
|
467 |
s->state = STATE_COLLECTING_DATA; |
468 |
} |
469 |
break;
|
470 |
|
471 |
case WRDI:
|
472 |
s->write_enable = false;
|
473 |
break;
|
474 |
case WREN:
|
475 |
s->write_enable = true;
|
476 |
break;
|
477 |
|
478 |
case RDSR:
|
479 |
s->data[0] = (!!s->write_enable) << 1; |
480 |
s->pos = 0;
|
481 |
s->len = 1;
|
482 |
s->state = STATE_READING_DATA; |
483 |
break;
|
484 |
|
485 |
case JEDEC_READ:
|
486 |
DB_PRINT("populated jedec code\n");
|
487 |
s->data[0] = (s->pi->jedec >> 16) & 0xff; |
488 |
s->data[1] = (s->pi->jedec >> 8) & 0xff; |
489 |
s->data[2] = s->pi->jedec & 0xff; |
490 |
if (s->pi->ext_jedec) {
|
491 |
s->data[3] = (s->pi->ext_jedec >> 8) & 0xff; |
492 |
s->data[4] = s->pi->ext_jedec & 0xff; |
493 |
s->len = 5;
|
494 |
} else {
|
495 |
s->len = 3;
|
496 |
} |
497 |
s->pos = 0;
|
498 |
s->state = STATE_READING_DATA; |
499 |
break;
|
500 |
|
501 |
case BULK_ERASE:
|
502 |
if (s->write_enable) {
|
503 |
DB_PRINT("chip erase\n");
|
504 |
flash_erase(s, 0, BULK_ERASE);
|
505 |
} else {
|
506 |
DB_PRINT("chip erase with write protect!\n");
|
507 |
} |
508 |
break;
|
509 |
case NOP:
|
510 |
break;
|
511 |
default:
|
512 |
DB_PRINT("Unknown cmd %x\n", value);
|
513 |
break;
|
514 |
} |
515 |
} |
516 |
|
517 |
static int m25p80_cs(SSISlave *ss, bool select) |
518 |
{ |
519 |
Flash *s = FROM_SSI_SLAVE(Flash, ss); |
520 |
|
521 |
if (select) {
|
522 |
s->len = 0;
|
523 |
s->pos = 0;
|
524 |
s->state = STATE_IDLE; |
525 |
flash_sync_dirty(s, -1);
|
526 |
} |
527 |
|
528 |
DB_PRINT("%sselect\n", select ? "de" : ""); |
529 |
|
530 |
return 0; |
531 |
} |
532 |
|
533 |
static uint32_t m25p80_transfer8(SSISlave *ss, uint32_t tx)
|
534 |
{ |
535 |
Flash *s = FROM_SSI_SLAVE(Flash, ss); |
536 |
uint32_t r = 0;
|
537 |
|
538 |
switch (s->state) {
|
539 |
|
540 |
case STATE_PAGE_PROGRAM:
|
541 |
DB_PRINT("page program cur_addr=%lx data=%x\n", s->cur_addr,
|
542 |
(uint8_t)tx); |
543 |
flash_write8(s, s->cur_addr, (uint8_t)tx); |
544 |
s->cur_addr++; |
545 |
break;
|
546 |
|
547 |
case STATE_READ:
|
548 |
r = s->storage[s->cur_addr]; |
549 |
DB_PRINT("READ 0x%lx=%x\n", s->cur_addr, r);
|
550 |
s->cur_addr = (s->cur_addr + 1) % s->size;
|
551 |
break;
|
552 |
|
553 |
case STATE_COLLECTING_DATA:
|
554 |
s->data[s->len] = (uint8_t)tx; |
555 |
s->len++; |
556 |
|
557 |
if (s->len == s->needed_bytes) {
|
558 |
complete_collecting_data(s); |
559 |
} |
560 |
break;
|
561 |
|
562 |
case STATE_READING_DATA:
|
563 |
r = s->data[s->pos]; |
564 |
s->pos++; |
565 |
if (s->pos == s->len) {
|
566 |
s->pos = 0;
|
567 |
s->state = STATE_IDLE; |
568 |
} |
569 |
break;
|
570 |
|
571 |
default:
|
572 |
case STATE_IDLE:
|
573 |
decode_new_cmd(s, (uint8_t)tx); |
574 |
break;
|
575 |
} |
576 |
|
577 |
return r;
|
578 |
} |
579 |
|
580 |
static int m25p80_init(SSISlave *ss) |
581 |
{ |
582 |
DriveInfo *dinfo; |
583 |
Flash *s = FROM_SSI_SLAVE(Flash, ss); |
584 |
M25P80Class *mc = M25P80_GET_CLASS(s); |
585 |
|
586 |
s->pi = mc->pi; |
587 |
|
588 |
s->size = s->pi->sector_size * s->pi->n_sectors; |
589 |
s->dirty_page = -1;
|
590 |
s->storage = qemu_blockalign(s->bdrv, s->size); |
591 |
|
592 |
dinfo = drive_get_next(IF_MTD); |
593 |
|
594 |
if (dinfo && dinfo->bdrv) {
|
595 |
DB_PRINT("Binding to IF_MTD drive\n");
|
596 |
s->bdrv = dinfo->bdrv; |
597 |
/* FIXME: Move to late init */
|
598 |
if (bdrv_read(s->bdrv, 0, s->storage, DIV_ROUND_UP(s->size, |
599 |
BDRV_SECTOR_SIZE))) { |
600 |
fprintf(stderr, "Failed to initialize SPI flash!\n");
|
601 |
return 1; |
602 |
} |
603 |
} else {
|
604 |
memset(s->storage, 0xFF, s->size);
|
605 |
} |
606 |
|
607 |
return 0; |
608 |
} |
609 |
|
610 |
static void m25p80_pre_save(void *opaque) |
611 |
{ |
612 |
flash_sync_dirty((Flash *)opaque, -1);
|
613 |
} |
614 |
|
615 |
static const VMStateDescription vmstate_m25p80 = { |
616 |
.name = "xilinx_spi",
|
617 |
.version_id = 1,
|
618 |
.minimum_version_id = 1,
|
619 |
.minimum_version_id_old = 1,
|
620 |
.pre_save = m25p80_pre_save, |
621 |
.fields = (VMStateField[]) { |
622 |
VMSTATE_UINT8(state, Flash), |
623 |
VMSTATE_UINT8_ARRAY(data, Flash, 16),
|
624 |
VMSTATE_UINT32(len, Flash), |
625 |
VMSTATE_UINT32(pos, Flash), |
626 |
VMSTATE_UINT8(needed_bytes, Flash), |
627 |
VMSTATE_UINT8(cmd_in_progress, Flash), |
628 |
VMSTATE_UINT64(cur_addr, Flash), |
629 |
VMSTATE_BOOL(write_enable, Flash), |
630 |
VMSTATE_END_OF_LIST() |
631 |
} |
632 |
}; |
633 |
|
634 |
static void m25p80_class_init(ObjectClass *klass, void *data) |
635 |
{ |
636 |
DeviceClass *dc = DEVICE_CLASS(klass); |
637 |
SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
638 |
M25P80Class *mc = M25P80_CLASS(klass); |
639 |
|
640 |
k->init = m25p80_init; |
641 |
k->transfer = m25p80_transfer8; |
642 |
k->set_cs = m25p80_cs; |
643 |
k->cs_polarity = SSI_CS_LOW; |
644 |
dc->vmsd = &vmstate_m25p80; |
645 |
mc->pi = data; |
646 |
} |
647 |
|
648 |
static const TypeInfo m25p80_info = { |
649 |
.name = TYPE_M25P80, |
650 |
.parent = TYPE_SSI_SLAVE, |
651 |
.instance_size = sizeof(Flash),
|
652 |
.class_size = sizeof(M25P80Class),
|
653 |
.abstract = true,
|
654 |
}; |
655 |
|
656 |
static void m25p80_register_types(void) |
657 |
{ |
658 |
int i;
|
659 |
|
660 |
type_register_static(&m25p80_info); |
661 |
for (i = 0; i < ARRAY_SIZE(known_devices); ++i) { |
662 |
TypeInfo ti = { |
663 |
.name = known_devices[i].part_name, |
664 |
.parent = TYPE_M25P80, |
665 |
.class_init = m25p80_class_init, |
666 |
.class_data = (void *)&known_devices[i],
|
667 |
}; |
668 |
type_register(&ti); |
669 |
} |
670 |
} |
671 |
|
672 |
type_init(m25p80_register_types) |