Revision 4a942cea target-i386/op_helper.c

b/target-i386/op_helper.c
2888 2888 
        break;
2889 2889 
    case 8:
2890 2890 
        if (!(env->hflags2 & HF2_VINTR_MASK)) {
2891 
            val = cpu_get_apic_tpr(env);
2891 
            val = cpu_get_apic_tpr(env->apic_state);
2892 2892 
        } else {
2893 2893 
            val = env->v_tpr;
2894 2894 
        }
......
2912 2912 
        break;
2913 2913 
    case 8:
2914 2914 
        if (!(env->hflags2 & HF2_VINTR_MASK)) {
2915 
            cpu_set_apic_tpr(env, t0);
2915 
            cpu_set_apic_tpr(env->apic_state, t0);
2916 2916 
        }
2917 2917 
        env->v_tpr = t0 & 0x0f;
2918 2918 
        break;
......
3020 3020 
        env->sysenter_eip = val;
3021 3021 
        break;
3022 3022 
    case MSR_IA32_APICBASE:
3023 
        cpu_set_apic_base(env, val);
3023 
        cpu_set_apic_base(env->apic_state, val);
3024 3024 
        break;
3025 3025 
    case MSR_EFER:
3026 3026 
        {
......
3153 3153 
        val = env->sysenter_eip;
3154 3154 
        break;
3155 3155 
    case MSR_IA32_APICBASE:
3156 
        val = cpu_get_apic_base(env);
3156 
        val = cpu_get_apic_base(env->apic_state);
3157 3157 
        break;
3158 3158 
    case MSR_EFER:
3159 3159 
        val = env->efer;

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