Revision 4aa9aca4 target-arm/translate.c

b/target-arm/translate.c
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#define gen_sbc_T0_T1() gen_sub_carry(cpu_T[0], cpu_T[0], cpu_T[1])
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#define gen_rsc_T0_T1() gen_sub_carry(cpu_T[0], cpu_T[1], cpu_T[0])
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/* FIXME:  Implement this natively.  */
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static inline void tcg_gen_not_i32(TCGv t0, TCGv t1)
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{
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    tcg_gen_xori_i32(t0, t1, ~0);
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}
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/* T0 &= ~T1.  Clobbers T1.  */
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/* FIXME: Implement bic natively.  */
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static inline void tcg_gen_bic_i32(TCGv dest, TCGv t0, TCGv t1)

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