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tcg-target.c 47.4 kB
tcg-target.h 3.5 kB

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# Date Author Comment
4b5a85c1 02/20/2010 10:31 am Richard Henderson

tcg-sparc: Implement neg.

The fallback implementation of "ret = 0 - arg1" isn't ideal,
first because of the extra tcg op to load the zero, and second
because we fail to handle zero as %g0 for arg1 of the sub.

Signed-off-by: Richard Henderson <>...

dbfe80e1 02/16/2010 07:53 pm Richard Henderson

tcg-sparc: Implement setcond, setcond2.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

cc6dfecf 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement ext32[su]_i64

The 32-bit right-shift instructions is defined to extend the shifted
output to 64-bits. A shift count of zero therefore is a simple
extension without actually shifting.

Signed-off-by: Richard Henderson <>...

583d1215 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement division properly.

The {div,divu}2 opcodes are intended for systems for which the
division instruction produces both quotient and remainder. Sparc
is not such a system. Indeed, the remainder must be computed as

quot = a / b
rem = a - (quot * b)...
5e143c43 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Do not remove %o012 from 'r' constraint.

Only 'L' constraint needs that.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

7a3766f3 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Implement add2, sub2, mulu2.

Add missing 32-bit double-word support opcodes.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

ba225198 01/12/2010 09:59 pm Richard Henderson

tcg-sparc: Add tcg_out_arithc.

Add a function to handle the register-vs-immediate test for arithmetic.

Also, adjust the OP_32_64 macro so that it auto-indents properly.
Rename the gen_arith32 label to gen_arith, since it handles 64-bit
arithmetic as well....

56f4927e 12/21/2009 10:52 pm Richard Henderson

tcg-sparc: Implement brcond2.

Split out tcg_out_cmp and properly handle immediate arguments.
Fix constraints on brcond to match what SUBCC accepts.
Add tcg_out_brcond2_i32 for 32-bit host.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

a212ea75 12/21/2009 10:52 pm Richard Henderson

tcg-sparc: Use TCG_TARGET_REG_BITS in conditional compilation.

The test TCG_TARGET_REG_BITS==64 is exactly the feature that we
are checking for, whereas something involving sparc_v9 or
sparc_v8plus should be reserved for something ISA related,
as with SMULX....

43172207 12/21/2009 10:52 pm Richard Henderson

tcg-sparc: Improve tcg_out_movi for sparc64.

Generate sign-extended 32-bit constants with SETHI+XOR.
Otherwise tidy the routine to avoid the need for
conditional compilation and code duplication with movi_imm32.

Signed-off-by: Richard Henderson <>...

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