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/*
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 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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 *
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 * Copyright (c) 2004-2007 Fabrice Bellard
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 * Copyright (c) 2007 Jocelyn Mayer
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "vl.h"
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#include "ppc_mac.h"
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/* UniN device */
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static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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}
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static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
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{
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    return 0;
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}
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static CPUWriteMemoryFunc *unin_write[] = {
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    &unin_writel,
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    &unin_writel,
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    &unin_writel,
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};
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static CPUReadMemoryFunc *unin_read[] = {
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    &unin_readl,
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    &unin_readl,
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    &unin_readl,
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};
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/* PowerPC Mac99 hardware initialisation */
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static void ppc_core99_init (int ram_size, int vga_ram_size, int boot_device,
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                             DisplayState *ds, const char **fd_filename,
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                             int snapshot,
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                             const char *kernel_filename,
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                             const char *kernel_cmdline,
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                             const char *initrd_filename,
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                             const char *cpu_model)
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{
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    CPUState *env, *envs[MAX_CPUS];
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    char buf[1024];
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    qemu_irq *pic, **openpic_irqs;
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    int unin_memory;
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    int linux_boot, i;
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    unsigned long bios_offset, vga_bios_offset;
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    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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    ppc_def_t *def;
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    PCIBus *pci_bus;
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    nvram_t nvram;
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#if 0
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    MacIONVRAMState *nvr;
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    int nvram_mem_index;
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#endif
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    m48t59_t *m48t59;
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    int vga_bios_size, bios_size;
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    qemu_irq *dummy_irq;
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    int pic_mem_index, dbdma_mem_index, cuda_mem_index;
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    int ide_mem_index[2];
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    linux_boot = (kernel_filename != NULL);
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    /* init CPUs */
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    env = cpu_init();
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    if (cpu_model == NULL)
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        cpu_model = "default";
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    ppc_find_by_name(cpu_model, &def);
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    if (def == NULL) {
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        cpu_abort(env, "Unable to find PowerPC CPU definition\n");
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    }
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    for (i = 0; i < smp_cpus; i++) {
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        cpu_ppc_register(env, def);
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        cpu_ppc_reset(env);
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        /* Set time-base frequency to 100 Mhz */
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        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
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#if 0
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        env->osi_call = vga_osi_call;
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#endif
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        qemu_register_reset(&cpu_ppc_reset, env);
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        register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
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        envs[i] = env;
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    }
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    if (env->nip < 0xFFF80000) {
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        /* Special test for PowerPC 601:
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         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
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         * But the NVRAM is located at 0xFFF04000...
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         */
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        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
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    }
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    /* allocate RAM */
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    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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    /* allocate and load BIOS */
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    bios_offset = ram_size + vga_ram_size;
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    if (bios_name == NULL)
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        bios_name = BIOS_FILENAME;
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    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
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    bios_size = load_image(buf, phys_ram_base + bios_offset);
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    if (bios_size < 0 || bios_size > BIOS_SIZE) {
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        cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
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        exit(1);
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    }
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    bios_size = (bios_size + 0xfff) & ~0xfff;
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    if (bios_size > 0x00080000) {
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        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
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        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
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    }
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    cpu_register_physical_memory((uint32_t)(-bios_size),
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                                 bios_size, bios_offset | IO_MEM_ROM);
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    /* allocate and load VGA BIOS */
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    vga_bios_offset = bios_offset + bios_size;
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    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
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    vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
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    if (vga_bios_size < 0) {
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        /* if no bios is present, we can still work */
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        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
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        vga_bios_size = 0;
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    } else {
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        /* set a specific header (XXX: find real Apple format for NDRV
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           drivers) */
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        phys_ram_base[vga_bios_offset] = 'N';
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        phys_ram_base[vga_bios_offset + 1] = 'D';
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        phys_ram_base[vga_bios_offset + 2] = 'R';
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        phys_ram_base[vga_bios_offset + 3] = 'V';
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        cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
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                     vga_bios_size);
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        vga_bios_size += 8;
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    }
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    vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
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    if (linux_boot) {
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        kernel_base = KERNEL_LOAD_ADDR;
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        /* now we can load the kernel */
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        kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
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        if (kernel_size < 0) {
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            cpu_abort(env, "qemu: could not load kernel '%s'\n",
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                      kernel_filename);
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            exit(1);
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        }
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        /* load initrd */
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        if (initrd_filename) {
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            initrd_base = INITRD_LOAD_ADDR;
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            initrd_size = load_image(initrd_filename,
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                                     phys_ram_base + initrd_base);
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            if (initrd_size < 0) {
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                cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
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                          initrd_filename);
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                exit(1);
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            }
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        } else {
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            initrd_base = 0;
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            initrd_size = 0;
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        }
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        boot_device = 'm';
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    } else {
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        kernel_base = 0;
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        kernel_size = 0;
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        initrd_base = 0;
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        initrd_size = 0;
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    }
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    isa_mem_base = 0x80000000;
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    /* Register 8 MB of ISA IO space */
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    isa_mmio_init(0xf2000000, 0x00800000);
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    /* UniN init */
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    unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
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    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
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    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
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    openpic_irqs[0] =
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        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
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    for (i = 0; i < smp_cpus; i++) {
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        /* Mac99 IRQ connection between OpenPIC outputs pins
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         * and PowerPC input pins
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         */
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        switch (PPC_INPUT(env)) {
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        case PPC_FLAGS_INPUT_6xx:
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            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
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            /* Not connected ? */
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            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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            /* Check this */
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            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
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            break;
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#if defined(TARGET_PPC64)
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        case PPC_FLAGS_INPUT_970:
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            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
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            /* Not connected ? */
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            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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            /* Check this */
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            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
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            break;
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#endif /* defined(TARGET_PPC64) */
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        default:
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            cpu_abort(env, "Bus model not supported on mac99 machine\n");
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            exit(1);
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        }
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    }
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    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
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    pci_bus = pci_pmac_init(pic);
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    /* init basic PC hardware */
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    pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
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                 ram_size, vga_ram_size,
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                 vga_bios_offset, vga_bios_size);
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    /* XXX: suppress that */
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    dummy_irq = i8259_init(NULL);
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    /* XXX: use Mac Serial port */
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    serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
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    for(i = 0; i < nb_nics; i++) {
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        if (!nd_table[i].model)
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            nd_table[i].model = "ne2k_pci";
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        pci_nic_init(pci_bus, &nd_table[i], -1);
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    }
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#if 1
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    ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
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    ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
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#else
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    pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
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#endif
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    /* cuda also initialize ADB */
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    cuda_init(&cuda_mem_index, pic[0x19]);
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    adb_kbd_init(&adb_bus);
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    adb_mouse_init(&adb_bus);
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    dbdma_init(&dbdma_mem_index);
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    macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
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               cuda_mem_index, -1, 2, ide_mem_index);
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    if (usb_enabled) {
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        usb_ohci_init_pci(pci_bus, 3, -1);
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    }
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    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
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        graphic_depth = 15;
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#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
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    /* The NewWorld NVRAM is not located in the MacIO device */
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    nvr = macio_nvram_init(&nvram_mem_index);
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    pmac_format_nvram_partition(nvr, 0x2000);
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    cpu_register_physical_memory(0xFFF04000, 0x20000, nvram_mem_index);
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    nvram.opaque = nvr;
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    nvram.read_fn = &macio_nvram_read;
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    nvram.write_fn = &macio_nvram_write;
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#else
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    m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
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    nvram.opaque = m48t59;
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    nvram.read_fn = &m48t59_read;
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    nvram.write_fn = &m48t59_write;
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#endif
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    PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size, boot_device,
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                         kernel_base, kernel_size,
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                         kernel_cmdline,
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                         initrd_base, initrd_size,
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                         /* XXX: need an option to load a NVRAM image */
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                         0,
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                         graphic_width, graphic_height, graphic_depth);
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    /* No PCI init: the BIOS will do it */
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    /* Special port to get debug messages from Open-Firmware */
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    register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
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 }
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QEMUMachine core99_machine = {
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    "mac99",
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    "Mac99 based PowerMAC",
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    ppc_core99_init,
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};