Revision 4c8732d7 hw/cirrus_vga.c
| b/hw/cirrus_vga.c | ||
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| 136 | 136 |
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// control 0x33 |
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#define CIRRUS_BLTMODEEXT_SOLIDFILL 0x04 |
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#define CIRRUS_BLTMODEEXT_COLOREXPINV 0x02 |
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#define CIRRUS_BLTMODEEXT_DWORDGRANULARITY 0x01 |
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// memory-mapped IO |
| ... | ... | |
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#include "cirrus_vga_rop.h" |
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#define ROP_NAME 1 |
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#define ROP_OP(d, s) d = 0xff
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#define ROP_OP(d, s) d = ~0
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#include "cirrus_vga_rop.h" |
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#define ROP_NAME notsrc_and_dst |
| ... | ... | |
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ROP2(cirrus_colorexpand_transp_notsrc_and_notdst), |
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}; |
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static const cirrus_bitblt_rop_t cirrus_colorexpand_transp_inv[16][4] = {
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ROP2(cirrus_colorexpand_transp_inv_0), |
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ROP2(cirrus_colorexpand_transp_inv_src_and_dst), |
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ROP_NOP2(cirrus_bitblt_rop_nop), |
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ROP2(cirrus_colorexpand_transp_inv_src_and_notdst), |
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ROP2(cirrus_colorexpand_transp_inv_notdst), |
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ROP2(cirrus_colorexpand_transp_inv_src), |
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ROP2(cirrus_colorexpand_transp_inv_1), |
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ROP2(cirrus_colorexpand_transp_inv_notsrc_and_dst), |
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ROP2(cirrus_colorexpand_transp_inv_src_xor_dst), |
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ROP2(cirrus_colorexpand_transp_inv_src_or_dst), |
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ROP2(cirrus_colorexpand_transp_inv_notsrc_or_notdst), |
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ROP2(cirrus_colorexpand_transp_inv_src_notxor_dst), |
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ROP2(cirrus_colorexpand_transp_inv_src_or_notdst), |
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ROP2(cirrus_colorexpand_transp_inv_notsrc), |
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ROP2(cirrus_colorexpand_transp_inv_notsrc_or_dst), |
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ROP2(cirrus_colorexpand_transp_inv_notsrc_and_notdst), |
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}; |
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static const cirrus_bitblt_rop_t cirrus_colorexpand[16][4] = {
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ROP2(cirrus_colorexpand_0), |
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ROP2(cirrus_colorexpand_src_and_dst), |
| ... | ... | |
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CIRRUS_BLTMODE_COLOREXPAND) {
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if (s->cirrus_blt_mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) {
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cirrus_bitblt_fgcol(s); |
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s->cirrus_rop = cirrus_colorexpand_transp[rop_to_index[blt_rop]][s->cirrus_blt_pixelwidth - 1]; |
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if (s->cirrus_blt_modeext & CIRRUS_BLTMODEEXT_COLOREXPINV) {
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cirrus_bitblt_bgcol(s); |
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s->cirrus_rop = cirrus_colorexpand_transp_inv[rop_to_index[blt_rop]][s->cirrus_blt_pixelwidth - 1]; |
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} else {
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cirrus_bitblt_fgcol(s); |
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s->cirrus_rop = cirrus_colorexpand_transp[rop_to_index[blt_rop]][s->cirrus_blt_pixelwidth - 1]; |
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} |
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} else {
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cirrus_bitblt_fgcol(s); |
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cirrus_bitblt_bgcol(s); |
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