Revision 4cb26382 tcg/mips/tcg-target.c
| b/tcg/mips/tcg-target.c | ||
|---|---|---|
| 274 | 274 |
OPC_BEQ = 0x04 << 26, |
| 275 | 275 |
OPC_BNE = 0x05 << 26, |
| 276 | 276 |
OPC_ADDIU = 0x09 << 26, |
| 277 |
OPC_SLTI = 0x0A << 26, |
|
| 278 |
OPC_SLTIU = 0x0B << 26, |
|
| 277 | 279 |
OPC_ANDI = 0x0C << 26, |
| 278 | 280 |
OPC_ORI = 0x0D << 26, |
| 279 | 281 |
OPC_XORI = 0x0E << 26, |
| ... | ... | |
| 583 | 585 |
reloc_pc16(label_ptr, (tcg_target_long) s->code_ptr); |
| 584 | 586 |
} |
| 585 | 587 |
|
| 588 |
static void tcg_out_setcond(TCGContext *s, int cond, int ret, |
|
| 589 |
int arg1, int arg2) |
|
| 590 |
{
|
|
| 591 |
switch (cond) {
|
|
| 592 |
case TCG_COND_EQ: |
|
| 593 |
if (arg1 == 0) {
|
|
| 594 |
tcg_out_opc_imm(s, OPC_SLTIU, ret, arg2, 1); |
|
| 595 |
} else if (arg2 == 0) {
|
|
| 596 |
tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); |
|
| 597 |
} else {
|
|
| 598 |
tcg_out_opc_reg(s, OPC_XOR, TCG_REG_AT, arg1, arg2); |
|
| 599 |
tcg_out_opc_imm(s, OPC_SLTIU, ret, TCG_REG_AT, 1); |
|
| 600 |
} |
|
| 601 |
break; |
|
| 602 |
case TCG_COND_NE: |
|
| 603 |
if (arg1 == 0) {
|
|
| 604 |
tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, arg2); |
|
| 605 |
} else if (arg2 == 0) {
|
|
| 606 |
tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, arg1); |
|
| 607 |
} else {
|
|
| 608 |
tcg_out_opc_reg(s, OPC_XOR, TCG_REG_AT, arg1, arg2); |
|
| 609 |
tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, TCG_REG_AT); |
|
| 610 |
} |
|
| 611 |
break; |
|
| 612 |
case TCG_COND_LT: |
|
| 613 |
tcg_out_opc_reg(s, OPC_SLT, ret, arg1, arg2); |
|
| 614 |
break; |
|
| 615 |
case TCG_COND_LTU: |
|
| 616 |
tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); |
|
| 617 |
break; |
|
| 618 |
case TCG_COND_GE: |
|
| 619 |
tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2); |
|
| 620 |
tcg_out_opc_imm(s, OPC_XORI, ret, TCG_REG_AT, 1); |
|
| 621 |
break; |
|
| 622 |
case TCG_COND_GEU: |
|
| 623 |
tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg1, arg2); |
|
| 624 |
tcg_out_opc_imm(s, OPC_XORI, ret, TCG_REG_AT, 1); |
|
| 625 |
break; |
|
| 626 |
case TCG_COND_LE: |
|
| 627 |
tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1); |
|
| 628 |
tcg_out_opc_imm(s, OPC_XORI, ret, TCG_REG_AT, 1); |
|
| 629 |
break; |
|
| 630 |
case TCG_COND_LEU: |
|
| 631 |
tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg2, arg1); |
|
| 632 |
tcg_out_opc_imm(s, OPC_XORI, ret, TCG_REG_AT, 1); |
|
| 633 |
break; |
|
| 634 |
case TCG_COND_GT: |
|
| 635 |
tcg_out_opc_reg(s, OPC_SLT, ret, arg2, arg1); |
|
| 636 |
break; |
|
| 637 |
case TCG_COND_GTU: |
|
| 638 |
tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1); |
|
| 639 |
break; |
|
| 640 |
default: |
|
| 641 |
tcg_abort(); |
|
| 642 |
break; |
|
| 643 |
} |
|
| 644 |
} |
|
| 645 |
|
|
| 586 | 646 |
#if defined(CONFIG_SOFTMMU) |
| 587 | 647 |
|
| 588 | 648 |
#include "../../softmmu_defs.h" |
| ... | ... | |
| 1155 | 1215 |
tcg_out_brcond2(s, args[4], args[0], args[1], args[2], args[3], args[5]); |
| 1156 | 1216 |
break; |
| 1157 | 1217 |
|
| 1218 |
case INDEX_op_setcond_i32: |
|
| 1219 |
tcg_out_setcond(s, args[3], args[0], args[1], args[2]); |
|
| 1220 |
break; |
|
| 1221 |
|
|
| 1158 | 1222 |
case INDEX_op_qemu_ld8u: |
| 1159 | 1223 |
tcg_out_qemu_ld(s, args, 0); |
| 1160 | 1224 |
break; |
| ... | ... | |
| 1228 | 1292 |
{ INDEX_op_sar_i32, { "r", "rZ", "riZ" } },
|
| 1229 | 1293 |
|
| 1230 | 1294 |
{ INDEX_op_brcond_i32, { "rZ", "rZ" } },
|
| 1295 |
{ INDEX_op_setcond_i32, { "r", "rZ", "rZ" } },
|
|
| 1231 | 1296 |
|
| 1232 | 1297 |
{ INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rJZ", "rJZ" } },
|
| 1233 | 1298 |
{ INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rJZ", "rJZ" } },
|
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