tcg-x86_64: implement setcond
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/x86_64: Avoid unnecessary REX.B prefixes.
The existing P_REXB internal opcode flag unconditionally emitsthe REX prefix. Technically it's not needed if the register inquestion is %al, %bl, %cl, %dl.
Eliding the prefix requires splitting the P_REXB flag into two,...
tcg/x86_64: Special-case all 32-bit AND operands.
This avoids an unnecessary REX.W prefix when dealing with ANDoperands that fit into a 32-bit quantity. The most common changeactually seen is movz[wb]q -> movz[wb]l.
Similarly, avoid REXW in ext{8,16}u_i64 tcg opcodes....
tcg/ppc64,x86_64: fix constraints of op_qemu_st64
This op only takes two arguments, not two.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/x86_64: add support for ext{8,16,32}u_i{32,64} TCG ops
tcg/x86_64: generated dec/inc instead of sub/add when possible
X86_64: Use proper jumps/calls when displacement exceeds +-2G
Signed-off-by: malc <av1474@comtv.ru>
Userspace guest address offsetting
Re-implement GUEST_BASE support.Offset guest ddress space by default if the guest binary containsregions below the host mmap_min_addr.Implement support for i386, x86-64 and arm hosts.
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>...
tcg/x86_64: optimize register allocation order
The beginning of the register allocation order list on the TCG x86_64target matches the list of clobbered registers. This means that when anhelper is called, there is almost always clobbered registers that have...
tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6838 c046a42c-6fe2-441c-8c8c-71466251a162
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