root / target-i386 / cpuid.c @ 4d067ed7
History | View | Annotate | Download (38.6 kB)
| 1 |
/*
|
|---|---|
| 2 |
* i386 CPUID helper functions
|
| 3 |
*
|
| 4 |
* Copyright (c) 2003 Fabrice Bellard
|
| 5 |
*
|
| 6 |
* This library is free software; you can redistribute it and/or
|
| 7 |
* modify it under the terms of the GNU Lesser General Public
|
| 8 |
* License as published by the Free Software Foundation; either
|
| 9 |
* version 2 of the License, or (at your option) any later version.
|
| 10 |
*
|
| 11 |
* This library is distributed in the hope that it will be useful,
|
| 12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
| 14 |
* Lesser General Public License for more details.
|
| 15 |
*
|
| 16 |
* You should have received a copy of the GNU Lesser General Public
|
| 17 |
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
| 18 |
*/
|
| 19 |
#include <stdlib.h> |
| 20 |
#include <stdio.h> |
| 21 |
#include <string.h> |
| 22 |
#include <inttypes.h> |
| 23 |
|
| 24 |
#include "cpu.h" |
| 25 |
#include "kvm.h" |
| 26 |
|
| 27 |
#include "qemu-option.h" |
| 28 |
#include "qemu-config.h" |
| 29 |
|
| 30 |
/* feature flags taken from "Intel Processor Identification and the CPUID
|
| 31 |
* Instruction" and AMD's "CPUID Specification". In cases of disagreement
|
| 32 |
* between feature naming conventions, aliases may be added.
|
| 33 |
*/
|
| 34 |
static const char *feature_name[] = { |
| 35 |
"fpu", "vme", "de", "pse", |
| 36 |
"tsc", "msr", "pae", "mce", |
| 37 |
"cx8", "apic", NULL, "sep", |
| 38 |
"mtrr", "pge", "mca", "cmov", |
| 39 |
"pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, |
| 40 |
NULL, "ds" /* Intel dts */, "acpi", "mmx", |
| 41 |
"fxsr", "sse", "sse2", "ss", |
| 42 |
"ht" /* Intel htt */, "tm", "ia64", "pbe", |
| 43 |
}; |
| 44 |
static const char *ext_feature_name[] = { |
| 45 |
"pni|sse3" /* Intel,AMD sse3 */, NULL, NULL, "monitor", |
| 46 |
"ds_cpl", "vmx", NULL /* Linux smx */, "est", |
| 47 |
"tm2", "ssse3", "cid", NULL, |
| 48 |
NULL, "cx16", "xtpr", NULL, |
| 49 |
NULL, NULL, "dca", "sse4.1|sse4_1", |
| 50 |
"sse4.2|sse4_2", "x2apic", NULL, "popcnt", |
| 51 |
NULL, NULL, NULL, NULL, |
| 52 |
NULL, NULL, NULL, "hypervisor", |
| 53 |
}; |
| 54 |
static const char *ext2_feature_name[] = { |
| 55 |
"fpu", "vme", "de", "pse", |
| 56 |
"tsc", "msr", "pae", "mce", |
| 57 |
"cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", |
| 58 |
"mtrr", "pge", "mca", "cmov", |
| 59 |
"pat", "pse36", NULL, NULL /* Linux mp */, |
| 60 |
"nx" /* Intel xd */, NULL, "mmxext", "mmx", |
| 61 |
"fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", |
| 62 |
NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", |
| 63 |
}; |
| 64 |
static const char *ext3_feature_name[] = { |
| 65 |
"lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, |
| 66 |
"cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", |
| 67 |
"3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, |
| 68 |
"skinit", "wdt", NULL, NULL, |
| 69 |
NULL, NULL, NULL, NULL, |
| 70 |
NULL, NULL, NULL, NULL, |
| 71 |
NULL, NULL, NULL, NULL, |
| 72 |
NULL, NULL, NULL, NULL, |
| 73 |
}; |
| 74 |
|
| 75 |
static const char *kvm_feature_name[] = { |
| 76 |
"kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, NULL, NULL, NULL, NULL, |
| 77 |
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
| 78 |
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
| 79 |
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
| 80 |
}; |
| 81 |
|
| 82 |
/* collects per-function cpuid data
|
| 83 |
*/
|
| 84 |
typedef struct model_features_t { |
| 85 |
uint32_t *guest_feat; |
| 86 |
uint32_t *host_feat; |
| 87 |
uint32_t check_feat; |
| 88 |
const char **flag_names; |
| 89 |
uint32_t cpuid; |
| 90 |
} model_features_t; |
| 91 |
|
| 92 |
int check_cpuid = 0; |
| 93 |
int enforce_cpuid = 0; |
| 94 |
|
| 95 |
static void host_cpuid(uint32_t function, uint32_t count, uint32_t *eax, |
| 96 |
uint32_t *ebx, uint32_t *ecx, uint32_t *edx); |
| 97 |
|
| 98 |
#define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c))) |
| 99 |
|
| 100 |
/* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
|
| 101 |
* a substring. ex if !NULL points to the first char after a substring,
|
| 102 |
* otherwise the string is assumed to sized by a terminating nul.
|
| 103 |
* Return lexical ordering of *s1:*s2.
|
| 104 |
*/
|
| 105 |
static int sstrcmp(const char *s1, const char *e1, const char *s2, |
| 106 |
const char *e2) |
| 107 |
{
|
| 108 |
for (;;) {
|
| 109 |
if (!*s1 || !*s2 || *s1 != *s2)
|
| 110 |
return (*s1 - *s2);
|
| 111 |
++s1, ++s2; |
| 112 |
if (s1 == e1 && s2 == e2)
|
| 113 |
return (0); |
| 114 |
else if (s1 == e1) |
| 115 |
return (*s2);
|
| 116 |
else if (s2 == e2) |
| 117 |
return (*s1);
|
| 118 |
} |
| 119 |
} |
| 120 |
|
| 121 |
/* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
|
| 122 |
* '|' delimited (possibly empty) strings in which case search for a match
|
| 123 |
* within the alternatives proceeds left to right. Return 0 for success,
|
| 124 |
* non-zero otherwise.
|
| 125 |
*/
|
| 126 |
static int altcmp(const char *s, const char *e, const char *altstr) |
| 127 |
{
|
| 128 |
const char *p, *q; |
| 129 |
|
| 130 |
for (q = p = altstr; ; ) {
|
| 131 |
while (*p && *p != '|') |
| 132 |
++p; |
| 133 |
if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
|
| 134 |
return (0); |
| 135 |
if (!*p)
|
| 136 |
return (1); |
| 137 |
else
|
| 138 |
q = ++p; |
| 139 |
} |
| 140 |
} |
| 141 |
|
| 142 |
/* search featureset for flag *[s..e), if found set corresponding bit in
|
| 143 |
* *pval and return success, otherwise return zero
|
| 144 |
*/
|
| 145 |
static int lookup_feature(uint32_t *pval, const char *s, const char *e, |
| 146 |
const char **featureset) |
| 147 |
{
|
| 148 |
uint32_t mask; |
| 149 |
const char **ppc; |
| 150 |
|
| 151 |
for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc) |
| 152 |
if (*ppc && !altcmp(s, e, *ppc)) {
|
| 153 |
*pval |= mask; |
| 154 |
break;
|
| 155 |
} |
| 156 |
return (mask ? 1 : 0); |
| 157 |
} |
| 158 |
|
| 159 |
static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features, |
| 160 |
uint32_t *ext_features, |
| 161 |
uint32_t *ext2_features, |
| 162 |
uint32_t *ext3_features, |
| 163 |
uint32_t *kvm_features) |
| 164 |
{
|
| 165 |
if (!lookup_feature(features, flagname, NULL, feature_name) && |
| 166 |
!lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
|
| 167 |
!lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
|
| 168 |
!lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
|
| 169 |
!lookup_feature(kvm_features, flagname, NULL, kvm_feature_name))
|
| 170 |
fprintf(stderr, "CPU feature %s not found\n", flagname);
|
| 171 |
} |
| 172 |
|
| 173 |
typedef struct x86_def_t { |
| 174 |
struct x86_def_t *next;
|
| 175 |
const char *name; |
| 176 |
uint32_t level; |
| 177 |
uint32_t vendor1, vendor2, vendor3; |
| 178 |
int family;
|
| 179 |
int model;
|
| 180 |
int stepping;
|
| 181 |
uint32_t features, ext_features, ext2_features, ext3_features, kvm_features; |
| 182 |
uint32_t xlevel; |
| 183 |
char model_id[48]; |
| 184 |
int vendor_override;
|
| 185 |
uint32_t flags; |
| 186 |
} x86_def_t; |
| 187 |
|
| 188 |
#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
|
| 189 |
#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
|
| 190 |
CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC) |
| 191 |
#define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
|
| 192 |
CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \ |
| 193 |
CPUID_PSE36 | CPUID_FXSR) |
| 194 |
#define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
|
| 195 |
#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
|
| 196 |
CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \ |
| 197 |
CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \ |
| 198 |
CPUID_PAE | CPUID_SEP | CPUID_APIC) |
| 199 |
#define EXT2_FEATURE_MASK 0x0183F3FF |
| 200 |
|
| 201 |
/* maintains list of cpu model definitions
|
| 202 |
*/
|
| 203 |
static x86_def_t *x86_defs = {NULL}; |
| 204 |
|
| 205 |
/* built-in cpu model definitions (deprecated)
|
| 206 |
*/
|
| 207 |
static x86_def_t builtin_x86_defs[] = {
|
| 208 |
#ifdef TARGET_X86_64
|
| 209 |
{
|
| 210 |
.name = "qemu64",
|
| 211 |
.level = 4,
|
| 212 |
.vendor1 = CPUID_VENDOR_AMD_1, |
| 213 |
.vendor2 = CPUID_VENDOR_AMD_2, |
| 214 |
.vendor3 = CPUID_VENDOR_AMD_3, |
| 215 |
.family = 6,
|
| 216 |
.model = 2,
|
| 217 |
.stepping = 3,
|
| 218 |
.features = PPRO_FEATURES | |
| 219 |
/* these features are needed for Win64 and aren't fully implemented */
|
| 220 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
| 221 |
/* this feature is needed for Solaris and isn't fully implemented */
|
| 222 |
CPUID_PSE36, |
| 223 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT, |
| 224 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | |
| 225 |
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
| 226 |
.ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | |
| 227 |
CPUID_EXT3_ABM | CPUID_EXT3_SSE4A, |
| 228 |
.xlevel = 0x8000000A,
|
| 229 |
.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
|
| 230 |
}, |
| 231 |
{
|
| 232 |
.name = "phenom",
|
| 233 |
.level = 5,
|
| 234 |
.vendor1 = CPUID_VENDOR_AMD_1, |
| 235 |
.vendor2 = CPUID_VENDOR_AMD_2, |
| 236 |
.vendor3 = CPUID_VENDOR_AMD_3, |
| 237 |
.family = 16,
|
| 238 |
.model = 2,
|
| 239 |
.stepping = 3,
|
| 240 |
/* Missing: CPUID_VME, CPUID_HT */
|
| 241 |
.features = PPRO_FEATURES | |
| 242 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
| 243 |
CPUID_PSE36, |
| 244 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 | |
| 245 |
CPUID_EXT_POPCNT, |
| 246 |
/* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
|
| 247 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | |
| 248 |
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | |
| 249 |
CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT | |
| 250 |
CPUID_EXT2_FFXSR, |
| 251 |
/* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
|
| 252 |
CPUID_EXT3_CR8LEG,
|
| 253 |
CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
|
| 254 |
CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
|
| 255 |
.ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | |
| 256 |
CPUID_EXT3_ABM | CPUID_EXT3_SSE4A, |
| 257 |
.xlevel = 0x8000001A,
|
| 258 |
.model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
|
| 259 |
}, |
| 260 |
{
|
| 261 |
.name = "core2duo",
|
| 262 |
.level = 10,
|
| 263 |
.family = 6,
|
| 264 |
.model = 15,
|
| 265 |
.stepping = 11,
|
| 266 |
/* The original CPU also implements these features:
|
| 267 |
CPUID_VME, CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
|
| 268 |
CPUID_TM, CPUID_PBE */
|
| 269 |
.features = PPRO_FEATURES | |
| 270 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
| 271 |
CPUID_PSE36, |
| 272 |
/* The original CPU also implements these ext features:
|
| 273 |
CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
|
| 274 |
CPUID_EXT_TM2, CPUID_EXT_CX16, CPUID_EXT_XTPR, CPUID_EXT_PDCM */
|
| 275 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3, |
| 276 |
.ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
| 277 |
.ext3_features = CPUID_EXT3_LAHF_LM, |
| 278 |
.xlevel = 0x80000008,
|
| 279 |
.model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
|
| 280 |
}, |
| 281 |
{
|
| 282 |
.name = "kvm64",
|
| 283 |
.level = 5,
|
| 284 |
.vendor1 = CPUID_VENDOR_INTEL_1, |
| 285 |
.vendor2 = CPUID_VENDOR_INTEL_2, |
| 286 |
.vendor3 = CPUID_VENDOR_INTEL_3, |
| 287 |
.family = 15,
|
| 288 |
.model = 6,
|
| 289 |
.stepping = 1,
|
| 290 |
/* Missing: CPUID_VME, CPUID_HT */
|
| 291 |
.features = PPRO_FEATURES | |
| 292 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
| 293 |
CPUID_PSE36, |
| 294 |
/* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
|
| 295 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16, |
| 296 |
/* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
|
| 297 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | |
| 298 |
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
| 299 |
/* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
|
| 300 |
CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
|
| 301 |
CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
|
| 302 |
CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
|
| 303 |
.ext3_features = 0,
|
| 304 |
.xlevel = 0x80000008,
|
| 305 |
.model_id = "Common KVM processor"
|
| 306 |
}, |
| 307 |
#endif
|
| 308 |
{
|
| 309 |
.name = "qemu32",
|
| 310 |
.level = 4,
|
| 311 |
.family = 6,
|
| 312 |
.model = 3,
|
| 313 |
.stepping = 3,
|
| 314 |
.features = PPRO_FEATURES, |
| 315 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT, |
| 316 |
.xlevel = 0,
|
| 317 |
.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
|
| 318 |
}, |
| 319 |
{
|
| 320 |
.name = "coreduo",
|
| 321 |
.level = 10,
|
| 322 |
.family = 6,
|
| 323 |
.model = 14,
|
| 324 |
.stepping = 8,
|
| 325 |
/* The original CPU also implements these features:
|
| 326 |
CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
|
| 327 |
CPUID_TM, CPUID_PBE */
|
| 328 |
.features = PPRO_FEATURES | CPUID_VME | |
| 329 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA, |
| 330 |
/* The original CPU also implements these ext features:
|
| 331 |
CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
|
| 332 |
CPUID_EXT_PDCM */
|
| 333 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR, |
| 334 |
.ext2_features = CPUID_EXT2_NX, |
| 335 |
.xlevel = 0x80000008,
|
| 336 |
.model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
|
| 337 |
}, |
| 338 |
{
|
| 339 |
.name = "486",
|
| 340 |
.level = 0,
|
| 341 |
.family = 4,
|
| 342 |
.model = 0,
|
| 343 |
.stepping = 0,
|
| 344 |
.features = I486_FEATURES, |
| 345 |
.xlevel = 0,
|
| 346 |
}, |
| 347 |
{
|
| 348 |
.name = "pentium",
|
| 349 |
.level = 1,
|
| 350 |
.family = 5,
|
| 351 |
.model = 4,
|
| 352 |
.stepping = 3,
|
| 353 |
.features = PENTIUM_FEATURES, |
| 354 |
.xlevel = 0,
|
| 355 |
}, |
| 356 |
{
|
| 357 |
.name = "pentium2",
|
| 358 |
.level = 2,
|
| 359 |
.family = 6,
|
| 360 |
.model = 5,
|
| 361 |
.stepping = 2,
|
| 362 |
.features = PENTIUM2_FEATURES, |
| 363 |
.xlevel = 0,
|
| 364 |
}, |
| 365 |
{
|
| 366 |
.name = "pentium3",
|
| 367 |
.level = 2,
|
| 368 |
.family = 6,
|
| 369 |
.model = 7,
|
| 370 |
.stepping = 3,
|
| 371 |
.features = PENTIUM3_FEATURES, |
| 372 |
.xlevel = 0,
|
| 373 |
}, |
| 374 |
{
|
| 375 |
.name = "athlon",
|
| 376 |
.level = 2,
|
| 377 |
.vendor1 = CPUID_VENDOR_AMD_1, |
| 378 |
.vendor2 = CPUID_VENDOR_AMD_2, |
| 379 |
.vendor3 = CPUID_VENDOR_AMD_3, |
| 380 |
.family = 6,
|
| 381 |
.model = 2,
|
| 382 |
.stepping = 3,
|
| 383 |
.features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA, |
| 384 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT, |
| 385 |
.xlevel = 0x80000008,
|
| 386 |
/* XXX: put another string ? */
|
| 387 |
.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
|
| 388 |
}, |
| 389 |
{
|
| 390 |
.name = "n270",
|
| 391 |
/* original is on level 10 */
|
| 392 |
.level = 5,
|
| 393 |
.family = 6,
|
| 394 |
.model = 28,
|
| 395 |
.stepping = 2,
|
| 396 |
.features = PPRO_FEATURES | |
| 397 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME, |
| 398 |
/* Missing: CPUID_DTS | CPUID_ACPI | CPUID_SS |
|
| 399 |
* CPUID_HT | CPUID_TM | CPUID_PBE */
|
| 400 |
/* Some CPUs got no CPUID_SEP */
|
| 401 |
.ext_features = CPUID_EXT_MONITOR | |
| 402 |
CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
|
| 403 |
/* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
|
| 404 |
* CPUID_EXT_TM2 | CPUID_EXT_XTPR */
|
| 405 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX, |
| 406 |
/* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
|
| 407 |
.xlevel = 0x8000000A,
|
| 408 |
.model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
|
| 409 |
}, |
| 410 |
}; |
| 411 |
|
| 412 |
static int cpu_x86_fill_model_id(char *str) |
| 413 |
{
|
| 414 |
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; |
| 415 |
int i;
|
| 416 |
|
| 417 |
for (i = 0; i < 3; i++) { |
| 418 |
host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx); |
| 419 |
memcpy(str + i * 16 + 0, &eax, 4); |
| 420 |
memcpy(str + i * 16 + 4, &ebx, 4); |
| 421 |
memcpy(str + i * 16 + 8, &ecx, 4); |
| 422 |
memcpy(str + i * 16 + 12, &edx, 4); |
| 423 |
} |
| 424 |
return 0; |
| 425 |
} |
| 426 |
|
| 427 |
static int cpu_x86_fill_host(x86_def_t *x86_cpu_def) |
| 428 |
{
|
| 429 |
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; |
| 430 |
|
| 431 |
x86_cpu_def->name = "host";
|
| 432 |
host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); |
| 433 |
x86_cpu_def->level = eax; |
| 434 |
x86_cpu_def->vendor1 = ebx; |
| 435 |
x86_cpu_def->vendor2 = edx; |
| 436 |
x86_cpu_def->vendor3 = ecx; |
| 437 |
|
| 438 |
host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); |
| 439 |
x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); |
| 440 |
x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); |
| 441 |
x86_cpu_def->stepping = eax & 0x0F;
|
| 442 |
x86_cpu_def->ext_features = ecx; |
| 443 |
x86_cpu_def->features = edx; |
| 444 |
|
| 445 |
host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx); |
| 446 |
x86_cpu_def->xlevel = eax; |
| 447 |
|
| 448 |
host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx); |
| 449 |
x86_cpu_def->ext2_features = edx; |
| 450 |
x86_cpu_def->ext3_features = ecx; |
| 451 |
cpu_x86_fill_model_id(x86_cpu_def->model_id); |
| 452 |
x86_cpu_def->vendor_override = 0;
|
| 453 |
|
| 454 |
return 0; |
| 455 |
} |
| 456 |
|
| 457 |
static int unavailable_host_feature(struct model_features_t *f, uint32_t mask) |
| 458 |
{
|
| 459 |
int i;
|
| 460 |
|
| 461 |
for (i = 0; i < 32; ++i) |
| 462 |
if (1 << i & mask) { |
| 463 |
fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
|
| 464 |
" flag '%s' [0x%08x]\n",
|
| 465 |
f->cpuid >> 16, f->cpuid & 0xffff, |
| 466 |
f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
|
| 467 |
break;
|
| 468 |
} |
| 469 |
return 0; |
| 470 |
} |
| 471 |
|
| 472 |
/* best effort attempt to inform user requested cpu flags aren't making
|
| 473 |
* their way to the guest. Note: ft[].check_feat ideally should be
|
| 474 |
* specified via a guest_def field to suppress report of extraneous flags.
|
| 475 |
*/
|
| 476 |
static int check_features_against_host(x86_def_t *guest_def) |
| 477 |
{
|
| 478 |
x86_def_t host_def; |
| 479 |
uint32_t mask; |
| 480 |
int rv, i;
|
| 481 |
struct model_features_t ft[] = {
|
| 482 |
{&guest_def->features, &host_def.features,
|
| 483 |
~0, feature_name, 0x00000000}, |
| 484 |
{&guest_def->ext_features, &host_def.ext_features,
|
| 485 |
~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
|
| 486 |
{&guest_def->ext2_features, &host_def.ext2_features,
|
| 487 |
~PPRO_FEATURES, ext2_feature_name, 0x80000000},
|
| 488 |
{&guest_def->ext3_features, &host_def.ext3_features,
|
| 489 |
~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
|
| 490 |
|
| 491 |
cpu_x86_fill_host(&host_def); |
| 492 |
for (rv = 0, i = 0; i < sizeof (ft) / sizeof (ft[0]); ++i) |
| 493 |
for (mask = 1; mask; mask <<= 1) |
| 494 |
if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
|
| 495 |
!(*ft[i].host_feat & mask)) {
|
| 496 |
unavailable_host_feature(&ft[i], mask); |
| 497 |
rv = 1;
|
| 498 |
} |
| 499 |
return rv;
|
| 500 |
} |
| 501 |
|
| 502 |
static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) |
| 503 |
{
|
| 504 |
unsigned int i; |
| 505 |
x86_def_t *def; |
| 506 |
|
| 507 |
char *s = strdup(cpu_model);
|
| 508 |
char *featurestr, *name = strtok(s, ","); |
| 509 |
uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0, plus_kvm_features = 0; |
| 510 |
uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0, minus_kvm_features = 0; |
| 511 |
uint32_t numvalue; |
| 512 |
|
| 513 |
for (def = x86_defs; def; def = def->next)
|
| 514 |
if (!strcmp(name, def->name))
|
| 515 |
break;
|
| 516 |
if (kvm_enabled() && strcmp(name, "host") == 0) { |
| 517 |
cpu_x86_fill_host(x86_cpu_def); |
| 518 |
} else if (!def) { |
| 519 |
goto error;
|
| 520 |
} else {
|
| 521 |
memcpy(x86_cpu_def, def, sizeof(*def));
|
| 522 |
} |
| 523 |
|
| 524 |
plus_kvm_features = ~0; /* not supported bits will be filtered out later */ |
| 525 |
|
| 526 |
add_flagname_to_bitmaps("hypervisor", &plus_features,
|
| 527 |
&plus_ext_features, &plus_ext2_features, &plus_ext3_features, |
| 528 |
&plus_kvm_features); |
| 529 |
|
| 530 |
featurestr = strtok(NULL, ","); |
| 531 |
|
| 532 |
while (featurestr) {
|
| 533 |
char *val;
|
| 534 |
if (featurestr[0] == '+') { |
| 535 |
add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features, &plus_kvm_features);
|
| 536 |
} else if (featurestr[0] == '-') { |
| 537 |
add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features, &minus_kvm_features);
|
| 538 |
} else if ((val = strchr(featurestr, '='))) { |
| 539 |
*val = 0; val++;
|
| 540 |
if (!strcmp(featurestr, "family")) { |
| 541 |
char *err;
|
| 542 |
numvalue = strtoul(val, &err, 0);
|
| 543 |
if (!*val || *err) {
|
| 544 |
fprintf(stderr, "bad numerical value %s\n", val);
|
| 545 |
goto error;
|
| 546 |
} |
| 547 |
x86_cpu_def->family = numvalue; |
| 548 |
} else if (!strcmp(featurestr, "model")) { |
| 549 |
char *err;
|
| 550 |
numvalue = strtoul(val, &err, 0);
|
| 551 |
if (!*val || *err || numvalue > 0xff) { |
| 552 |
fprintf(stderr, "bad numerical value %s\n", val);
|
| 553 |
goto error;
|
| 554 |
} |
| 555 |
x86_cpu_def->model = numvalue; |
| 556 |
} else if (!strcmp(featurestr, "stepping")) { |
| 557 |
char *err;
|
| 558 |
numvalue = strtoul(val, &err, 0);
|
| 559 |
if (!*val || *err || numvalue > 0xf) { |
| 560 |
fprintf(stderr, "bad numerical value %s\n", val);
|
| 561 |
goto error;
|
| 562 |
} |
| 563 |
x86_cpu_def->stepping = numvalue ; |
| 564 |
} else if (!strcmp(featurestr, "level")) { |
| 565 |
char *err;
|
| 566 |
numvalue = strtoul(val, &err, 0);
|
| 567 |
if (!*val || *err) {
|
| 568 |
fprintf(stderr, "bad numerical value %s\n", val);
|
| 569 |
goto error;
|
| 570 |
} |
| 571 |
x86_cpu_def->level = numvalue; |
| 572 |
} else if (!strcmp(featurestr, "xlevel")) { |
| 573 |
char *err;
|
| 574 |
numvalue = strtoul(val, &err, 0);
|
| 575 |
if (!*val || *err) {
|
| 576 |
fprintf(stderr, "bad numerical value %s\n", val);
|
| 577 |
goto error;
|
| 578 |
} |
| 579 |
if (numvalue < 0x80000000) { |
| 580 |
numvalue += 0x80000000;
|
| 581 |
} |
| 582 |
x86_cpu_def->xlevel = numvalue; |
| 583 |
} else if (!strcmp(featurestr, "vendor")) { |
| 584 |
if (strlen(val) != 12) { |
| 585 |
fprintf(stderr, "vendor string must be 12 chars long\n");
|
| 586 |
goto error;
|
| 587 |
} |
| 588 |
x86_cpu_def->vendor1 = 0;
|
| 589 |
x86_cpu_def->vendor2 = 0;
|
| 590 |
x86_cpu_def->vendor3 = 0;
|
| 591 |
for(i = 0; i < 4; i++) { |
| 592 |
x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
|
| 593 |
x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i); |
| 594 |
x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i); |
| 595 |
} |
| 596 |
x86_cpu_def->vendor_override = 1;
|
| 597 |
} else if (!strcmp(featurestr, "model_id")) { |
| 598 |
pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
|
| 599 |
val); |
| 600 |
} else {
|
| 601 |
fprintf(stderr, "unrecognized feature %s\n", featurestr);
|
| 602 |
goto error;
|
| 603 |
} |
| 604 |
} else if (!strcmp(featurestr, "check")) { |
| 605 |
check_cpuid = 1;
|
| 606 |
} else if (!strcmp(featurestr, "enforce")) { |
| 607 |
check_cpuid = enforce_cpuid = 1;
|
| 608 |
} else {
|
| 609 |
fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
|
| 610 |
goto error;
|
| 611 |
} |
| 612 |
featurestr = strtok(NULL, ","); |
| 613 |
} |
| 614 |
x86_cpu_def->features |= plus_features; |
| 615 |
x86_cpu_def->ext_features |= plus_ext_features; |
| 616 |
x86_cpu_def->ext2_features |= plus_ext2_features; |
| 617 |
x86_cpu_def->ext3_features |= plus_ext3_features; |
| 618 |
x86_cpu_def->kvm_features |= plus_kvm_features; |
| 619 |
x86_cpu_def->features &= ~minus_features; |
| 620 |
x86_cpu_def->ext_features &= ~minus_ext_features; |
| 621 |
x86_cpu_def->ext2_features &= ~minus_ext2_features; |
| 622 |
x86_cpu_def->ext3_features &= ~minus_ext3_features; |
| 623 |
x86_cpu_def->kvm_features &= ~minus_kvm_features; |
| 624 |
if (check_cpuid) {
|
| 625 |
if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
|
| 626 |
goto error;
|
| 627 |
} |
| 628 |
free(s); |
| 629 |
return 0; |
| 630 |
|
| 631 |
error:
|
| 632 |
free(s); |
| 633 |
return -1; |
| 634 |
} |
| 635 |
|
| 636 |
/* generate a composite string into buf of all cpuid names in featureset
|
| 637 |
* selected by fbits. indicate truncation at bufsize in the event of overflow.
|
| 638 |
* if flags, suppress names undefined in featureset.
|
| 639 |
*/
|
| 640 |
static void listflags(char *buf, int bufsize, uint32_t fbits, |
| 641 |
const char **featureset, uint32_t flags) |
| 642 |
{
|
| 643 |
const char **p = &featureset[31]; |
| 644 |
char *q, *b, bit;
|
| 645 |
int nc;
|
| 646 |
|
| 647 |
b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL; |
| 648 |
*buf = '\0';
|
| 649 |
for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit) |
| 650 |
if (fbits & 1 << bit && (*p || !flags)) { |
| 651 |
if (*p)
|
| 652 |
nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p); |
| 653 |
else
|
| 654 |
nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit); |
| 655 |
if (bufsize <= nc) {
|
| 656 |
if (b) {
|
| 657 |
memcpy(b, "...", sizeof("...")); |
| 658 |
} |
| 659 |
return;
|
| 660 |
} |
| 661 |
q += nc; |
| 662 |
bufsize -= nc; |
| 663 |
} |
| 664 |
} |
| 665 |
|
| 666 |
/* generate CPU information:
|
| 667 |
* -? list model names
|
| 668 |
* -?model list model names/IDs
|
| 669 |
* -?dump output all model (x86_def_t) data
|
| 670 |
* -?cpuid list all recognized cpuid flag names
|
| 671 |
*/
|
| 672 |
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
| 673 |
const char *optarg) |
| 674 |
{
|
| 675 |
unsigned char model = !strcmp("?model", optarg); |
| 676 |
unsigned char dump = !strcmp("?dump", optarg); |
| 677 |
unsigned char cpuid = !strcmp("?cpuid", optarg); |
| 678 |
x86_def_t *def; |
| 679 |
char buf[256]; |
| 680 |
|
| 681 |
if (cpuid) {
|
| 682 |
(*cpu_fprintf)(f, "Recognized CPUID flags:\n");
|
| 683 |
listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1); |
| 684 |
(*cpu_fprintf)(f, " f_edx: %s\n", buf);
|
| 685 |
listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1); |
| 686 |
(*cpu_fprintf)(f, " f_ecx: %s\n", buf);
|
| 687 |
listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1); |
| 688 |
(*cpu_fprintf)(f, " extf_edx: %s\n", buf);
|
| 689 |
listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1); |
| 690 |
(*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
|
| 691 |
return;
|
| 692 |
} |
| 693 |
for (def = x86_defs; def; def = def->next) {
|
| 694 |
snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name); |
| 695 |
if (model || dump) {
|
| 696 |
(*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
|
| 697 |
} else {
|
| 698 |
(*cpu_fprintf)(f, "x86 %16s\n", buf);
|
| 699 |
} |
| 700 |
if (dump) {
|
| 701 |
memcpy(buf, &def->vendor1, sizeof (def->vendor1));
|
| 702 |
memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2)); |
| 703 |
memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3)); |
| 704 |
buf[12] = '\0'; |
| 705 |
(*cpu_fprintf)(f, |
| 706 |
" family %d model %d stepping %d level %d xlevel 0x%x"
|
| 707 |
" vendor \"%s\"\n",
|
| 708 |
def->family, def->model, def->stepping, def->level, |
| 709 |
def->xlevel, buf); |
| 710 |
listflags(buf, sizeof (buf), def->features, feature_name, 0); |
| 711 |
(*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
|
| 712 |
buf); |
| 713 |
listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
|
| 714 |
0);
|
| 715 |
(*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
|
| 716 |
buf); |
| 717 |
listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
|
| 718 |
0);
|
| 719 |
(*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
|
| 720 |
def->ext2_features, buf); |
| 721 |
listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
|
| 722 |
0);
|
| 723 |
(*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
|
| 724 |
def->ext3_features, buf); |
| 725 |
(*cpu_fprintf)(f, "\n");
|
| 726 |
} |
| 727 |
} |
| 728 |
} |
| 729 |
|
| 730 |
int cpu_x86_register (CPUX86State *env, const char *cpu_model) |
| 731 |
{
|
| 732 |
x86_def_t def1, *def = &def1; |
| 733 |
|
| 734 |
if (cpu_x86_find_by_name(def, cpu_model) < 0) |
| 735 |
return -1; |
| 736 |
if (def->vendor1) {
|
| 737 |
env->cpuid_vendor1 = def->vendor1; |
| 738 |
env->cpuid_vendor2 = def->vendor2; |
| 739 |
env->cpuid_vendor3 = def->vendor3; |
| 740 |
} else {
|
| 741 |
env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1; |
| 742 |
env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2; |
| 743 |
env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3; |
| 744 |
} |
| 745 |
env->cpuid_vendor_override = def->vendor_override; |
| 746 |
env->cpuid_level = def->level; |
| 747 |
if (def->family > 0x0f) |
| 748 |
env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20); |
| 749 |
else
|
| 750 |
env->cpuid_version = def->family << 8;
|
| 751 |
env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16); |
| 752 |
env->cpuid_version |= def->stepping; |
| 753 |
env->cpuid_features = def->features; |
| 754 |
env->pat = 0x0007040600070406ULL;
|
| 755 |
env->cpuid_ext_features = def->ext_features; |
| 756 |
env->cpuid_ext2_features = def->ext2_features; |
| 757 |
env->cpuid_ext3_features = def->ext3_features; |
| 758 |
env->cpuid_xlevel = def->xlevel; |
| 759 |
env->cpuid_kvm_features = def->kvm_features; |
| 760 |
{
|
| 761 |
const char *model_id = def->model_id; |
| 762 |
int c, len, i;
|
| 763 |
if (!model_id)
|
| 764 |
model_id = "";
|
| 765 |
len = strlen(model_id); |
| 766 |
for(i = 0; i < 48; i++) { |
| 767 |
if (i >= len)
|
| 768 |
c = '\0';
|
| 769 |
else
|
| 770 |
c = (uint8_t)model_id[i]; |
| 771 |
env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); |
| 772 |
} |
| 773 |
} |
| 774 |
return 0; |
| 775 |
} |
| 776 |
|
| 777 |
#if !defined(CONFIG_USER_ONLY)
|
| 778 |
/* copy vendor id string to 32 bit register, nul pad as needed
|
| 779 |
*/
|
| 780 |
static void cpyid(const char *s, uint32_t *id) |
| 781 |
{
|
| 782 |
char *d = (char *)id; |
| 783 |
char i;
|
| 784 |
|
| 785 |
for (i = sizeof (*id); i--; ) |
| 786 |
*d++ = *s ? *s++ : '\0';
|
| 787 |
} |
| 788 |
|
| 789 |
/* interpret radix and convert from string to arbitrary scalar,
|
| 790 |
* otherwise flag failure
|
| 791 |
*/
|
| 792 |
#define setscalar(pval, str, perr) \
|
| 793 |
{ \
|
| 794 |
char *pend; \
|
| 795 |
unsigned long ul; \ |
| 796 |
\ |
| 797 |
ul = strtoul(str, &pend, 0); \
|
| 798 |
*str && !*pend ? (*pval = ul) : (*perr = 1); \
|
| 799 |
} |
| 800 |
|
| 801 |
/* map cpuid options to feature bits, otherwise return failure
|
| 802 |
* (option tags in *str are delimited by whitespace)
|
| 803 |
*/
|
| 804 |
static void setfeatures(uint32_t *pval, const char *str, |
| 805 |
const char **featureset, int *perr) |
| 806 |
{
|
| 807 |
const char *p, *q; |
| 808 |
|
| 809 |
for (q = p = str; *p || *q; q = p) {
|
| 810 |
while (iswhite(*p))
|
| 811 |
q = ++p; |
| 812 |
while (*p && !iswhite(*p))
|
| 813 |
++p; |
| 814 |
if (!*q && !*p)
|
| 815 |
return;
|
| 816 |
if (!lookup_feature(pval, q, p, featureset)) {
|
| 817 |
fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
|
| 818 |
(int)(p - q), q);
|
| 819 |
*perr = 1;
|
| 820 |
return;
|
| 821 |
} |
| 822 |
} |
| 823 |
} |
| 824 |
|
| 825 |
/* map config file options to x86_def_t form
|
| 826 |
*/
|
| 827 |
static int cpudef_setfield(const char *name, const char *str, void *opaque) |
| 828 |
{
|
| 829 |
x86_def_t *def = opaque; |
| 830 |
int err = 0; |
| 831 |
|
| 832 |
if (!strcmp(name, "name")) { |
| 833 |
def->name = strdup(str); |
| 834 |
} else if (!strcmp(name, "model_id")) { |
| 835 |
strncpy(def->model_id, str, sizeof (def->model_id));
|
| 836 |
} else if (!strcmp(name, "level")) { |
| 837 |
setscalar(&def->level, str, &err) |
| 838 |
} else if (!strcmp(name, "vendor")) { |
| 839 |
cpyid(&str[0], &def->vendor1);
|
| 840 |
cpyid(&str[4], &def->vendor2);
|
| 841 |
cpyid(&str[8], &def->vendor3);
|
| 842 |
} else if (!strcmp(name, "family")) { |
| 843 |
setscalar(&def->family, str, &err) |
| 844 |
} else if (!strcmp(name, "model")) { |
| 845 |
setscalar(&def->model, str, &err) |
| 846 |
} else if (!strcmp(name, "stepping")) { |
| 847 |
setscalar(&def->stepping, str, &err) |
| 848 |
} else if (!strcmp(name, "feature_edx")) { |
| 849 |
setfeatures(&def->features, str, feature_name, &err); |
| 850 |
} else if (!strcmp(name, "feature_ecx")) { |
| 851 |
setfeatures(&def->ext_features, str, ext_feature_name, &err); |
| 852 |
} else if (!strcmp(name, "extfeature_edx")) { |
| 853 |
setfeatures(&def->ext2_features, str, ext2_feature_name, &err); |
| 854 |
} else if (!strcmp(name, "extfeature_ecx")) { |
| 855 |
setfeatures(&def->ext3_features, str, ext3_feature_name, &err); |
| 856 |
} else if (!strcmp(name, "xlevel")) { |
| 857 |
setscalar(&def->xlevel, str, &err) |
| 858 |
} else {
|
| 859 |
fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
|
| 860 |
return (1); |
| 861 |
} |
| 862 |
if (err) {
|
| 863 |
fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
|
| 864 |
return (1); |
| 865 |
} |
| 866 |
return (0); |
| 867 |
} |
| 868 |
|
| 869 |
/* register config file entry as x86_def_t
|
| 870 |
*/
|
| 871 |
static int cpudef_register(QemuOpts *opts, void *opaque) |
| 872 |
{
|
| 873 |
x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
|
| 874 |
|
| 875 |
qemu_opt_foreach(opts, cpudef_setfield, def, 1);
|
| 876 |
def->next = x86_defs; |
| 877 |
x86_defs = def; |
| 878 |
return (0); |
| 879 |
} |
| 880 |
#endif /* !CONFIG_USER_ONLY */ |
| 881 |
|
| 882 |
/* register "cpudef" models defined in configuration file. Here we first
|
| 883 |
* preload any built-in definitions
|
| 884 |
*/
|
| 885 |
void x86_cpudef_setup(void) |
| 886 |
{
|
| 887 |
int i;
|
| 888 |
|
| 889 |
for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) { |
| 890 |
builtin_x86_defs[i].next = x86_defs; |
| 891 |
builtin_x86_defs[i].flags = 1;
|
| 892 |
x86_defs = &builtin_x86_defs[i]; |
| 893 |
} |
| 894 |
#if !defined(CONFIG_USER_ONLY)
|
| 895 |
qemu_opts_foreach(&qemu_cpudef_opts, cpudef_register, NULL, 0); |
| 896 |
#endif
|
| 897 |
} |
| 898 |
|
| 899 |
static void host_cpuid(uint32_t function, uint32_t count, |
| 900 |
uint32_t *eax, uint32_t *ebx, |
| 901 |
uint32_t *ecx, uint32_t *edx) |
| 902 |
{
|
| 903 |
#if defined(CONFIG_KVM)
|
| 904 |
uint32_t vec[4];
|
| 905 |
|
| 906 |
#ifdef __x86_64__
|
| 907 |
asm volatile("cpuid" |
| 908 |
: "=a"(vec[0]), "=b"(vec[1]), |
| 909 |
"=c"(vec[2]), "=d"(vec[3]) |
| 910 |
: "0"(function), "c"(count) : "cc"); |
| 911 |
#else
|
| 912 |
asm volatile("pusha \n\t" |
| 913 |
"cpuid \n\t"
|
| 914 |
"mov %%eax, 0(%2) \n\t"
|
| 915 |
"mov %%ebx, 4(%2) \n\t"
|
| 916 |
"mov %%ecx, 8(%2) \n\t"
|
| 917 |
"mov %%edx, 12(%2) \n\t"
|
| 918 |
"popa"
|
| 919 |
: : "a"(function), "c"(count), "S"(vec) |
| 920 |
: "memory", "cc"); |
| 921 |
#endif
|
| 922 |
|
| 923 |
if (eax)
|
| 924 |
*eax = vec[0];
|
| 925 |
if (ebx)
|
| 926 |
*ebx = vec[1];
|
| 927 |
if (ecx)
|
| 928 |
*ecx = vec[2];
|
| 929 |
if (edx)
|
| 930 |
*edx = vec[3];
|
| 931 |
#endif
|
| 932 |
} |
| 933 |
|
| 934 |
static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx, |
| 935 |
uint32_t *ecx, uint32_t *edx) |
| 936 |
{
|
| 937 |
*ebx = env->cpuid_vendor1; |
| 938 |
*edx = env->cpuid_vendor2; |
| 939 |
*ecx = env->cpuid_vendor3; |
| 940 |
|
| 941 |
/* sysenter isn't supported on compatibility mode on AMD, syscall
|
| 942 |
* isn't supported in compatibility mode on Intel.
|
| 943 |
* Normally we advertise the actual cpu vendor, but you can override
|
| 944 |
* this if you want to use KVM's sysenter/syscall emulation
|
| 945 |
* in compatibility mode and when doing cross vendor migration
|
| 946 |
*/
|
| 947 |
if (kvm_enabled() && env->cpuid_vendor_override) {
|
| 948 |
host_cpuid(0, 0, NULL, ebx, ecx, edx); |
| 949 |
} |
| 950 |
} |
| 951 |
|
| 952 |
void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
| 953 |
uint32_t *eax, uint32_t *ebx, |
| 954 |
uint32_t *ecx, uint32_t *edx) |
| 955 |
{
|
| 956 |
/* test if maximum index reached */
|
| 957 |
if (index & 0x80000000) { |
| 958 |
if (index > env->cpuid_xlevel)
|
| 959 |
index = env->cpuid_level; |
| 960 |
} else {
|
| 961 |
if (index > env->cpuid_level)
|
| 962 |
index = env->cpuid_level; |
| 963 |
} |
| 964 |
|
| 965 |
switch(index) {
|
| 966 |
case 0: |
| 967 |
*eax = env->cpuid_level; |
| 968 |
get_cpuid_vendor(env, ebx, ecx, edx); |
| 969 |
break;
|
| 970 |
case 1: |
| 971 |
*eax = env->cpuid_version; |
| 972 |
*ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */ |
| 973 |
*ecx = env->cpuid_ext_features; |
| 974 |
*edx = env->cpuid_features; |
| 975 |
if (env->nr_cores * env->nr_threads > 1) { |
| 976 |
*ebx |= (env->nr_cores * env->nr_threads) << 16;
|
| 977 |
*edx |= 1 << 28; /* HTT bit */ |
| 978 |
} |
| 979 |
break;
|
| 980 |
case 2: |
| 981 |
/* cache info: needed for Pentium Pro compatibility */
|
| 982 |
*eax = 1;
|
| 983 |
*ebx = 0;
|
| 984 |
*ecx = 0;
|
| 985 |
*edx = 0x2c307d;
|
| 986 |
break;
|
| 987 |
case 4: |
| 988 |
/* cache info: needed for Core compatibility */
|
| 989 |
if (env->nr_cores > 1) { |
| 990 |
*eax = (env->nr_cores - 1) << 26; |
| 991 |
} else {
|
| 992 |
*eax = 0;
|
| 993 |
} |
| 994 |
switch (count) {
|
| 995 |
case 0: /* L1 dcache info */ |
| 996 |
*eax |= 0x0000121;
|
| 997 |
*ebx = 0x1c0003f;
|
| 998 |
*ecx = 0x000003f;
|
| 999 |
*edx = 0x0000001;
|
| 1000 |
break;
|
| 1001 |
case 1: /* L1 icache info */ |
| 1002 |
*eax |= 0x0000122;
|
| 1003 |
*ebx = 0x1c0003f;
|
| 1004 |
*ecx = 0x000003f;
|
| 1005 |
*edx = 0x0000001;
|
| 1006 |
break;
|
| 1007 |
case 2: /* L2 cache info */ |
| 1008 |
*eax |= 0x0000143;
|
| 1009 |
if (env->nr_threads > 1) { |
| 1010 |
*eax |= (env->nr_threads - 1) << 14; |
| 1011 |
} |
| 1012 |
*ebx = 0x3c0003f;
|
| 1013 |
*ecx = 0x0000fff;
|
| 1014 |
*edx = 0x0000001;
|
| 1015 |
break;
|
| 1016 |
default: /* end of info */ |
| 1017 |
*eax = 0;
|
| 1018 |
*ebx = 0;
|
| 1019 |
*ecx = 0;
|
| 1020 |
*edx = 0;
|
| 1021 |
break;
|
| 1022 |
} |
| 1023 |
break;
|
| 1024 |
case 5: |
| 1025 |
/* mwait info: needed for Core compatibility */
|
| 1026 |
*eax = 0; /* Smallest monitor-line size in bytes */ |
| 1027 |
*ebx = 0; /* Largest monitor-line size in bytes */ |
| 1028 |
*ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE; |
| 1029 |
*edx = 0;
|
| 1030 |
break;
|
| 1031 |
case 6: |
| 1032 |
/* Thermal and Power Leaf */
|
| 1033 |
*eax = 0;
|
| 1034 |
*ebx = 0;
|
| 1035 |
*ecx = 0;
|
| 1036 |
*edx = 0;
|
| 1037 |
break;
|
| 1038 |
case 9: |
| 1039 |
/* Direct Cache Access Information Leaf */
|
| 1040 |
*eax = 0; /* Bits 0-31 in DCA_CAP MSR */ |
| 1041 |
*ebx = 0;
|
| 1042 |
*ecx = 0;
|
| 1043 |
*edx = 0;
|
| 1044 |
break;
|
| 1045 |
case 0xA: |
| 1046 |
/* Architectural Performance Monitoring Leaf */
|
| 1047 |
*eax = 0;
|
| 1048 |
*ebx = 0;
|
| 1049 |
*ecx = 0;
|
| 1050 |
*edx = 0;
|
| 1051 |
break;
|
| 1052 |
case 0x80000000: |
| 1053 |
*eax = env->cpuid_xlevel; |
| 1054 |
*ebx = env->cpuid_vendor1; |
| 1055 |
*edx = env->cpuid_vendor2; |
| 1056 |
*ecx = env->cpuid_vendor3; |
| 1057 |
break;
|
| 1058 |
case 0x80000001: |
| 1059 |
*eax = env->cpuid_version; |
| 1060 |
*ebx = 0;
|
| 1061 |
*ecx = env->cpuid_ext3_features; |
| 1062 |
*edx = env->cpuid_ext2_features; |
| 1063 |
|
| 1064 |
/* The Linux kernel checks for the CMPLegacy bit and
|
| 1065 |
* discards multiple thread information if it is set.
|
| 1066 |
* So dont set it here for Intel to make Linux guests happy.
|
| 1067 |
*/
|
| 1068 |
if (env->nr_cores * env->nr_threads > 1) { |
| 1069 |
uint32_t tebx, tecx, tedx; |
| 1070 |
get_cpuid_vendor(env, &tebx, &tecx, &tedx); |
| 1071 |
if (tebx != CPUID_VENDOR_INTEL_1 ||
|
| 1072 |
tedx != CPUID_VENDOR_INTEL_2 || |
| 1073 |
tecx != CPUID_VENDOR_INTEL_3) {
|
| 1074 |
*ecx |= 1 << 1; /* CmpLegacy bit */ |
| 1075 |
} |
| 1076 |
} |
| 1077 |
|
| 1078 |
if (kvm_enabled()) {
|
| 1079 |
/* Nested SVM not yet supported in upstream QEMU */
|
| 1080 |
*ecx &= ~CPUID_EXT3_SVM; |
| 1081 |
} |
| 1082 |
break;
|
| 1083 |
case 0x80000002: |
| 1084 |
case 0x80000003: |
| 1085 |
case 0x80000004: |
| 1086 |
*eax = env->cpuid_model[(index - 0x80000002) * 4 + 0]; |
| 1087 |
*ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1]; |
| 1088 |
*ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2]; |
| 1089 |
*edx = env->cpuid_model[(index - 0x80000002) * 4 + 3]; |
| 1090 |
break;
|
| 1091 |
case 0x80000005: |
| 1092 |
/* cache info (L1 cache) */
|
| 1093 |
*eax = 0x01ff01ff;
|
| 1094 |
*ebx = 0x01ff01ff;
|
| 1095 |
*ecx = 0x40020140;
|
| 1096 |
*edx = 0x40020140;
|
| 1097 |
break;
|
| 1098 |
case 0x80000006: |
| 1099 |
/* cache info (L2 cache) */
|
| 1100 |
*eax = 0;
|
| 1101 |
*ebx = 0x42004200;
|
| 1102 |
*ecx = 0x02008140;
|
| 1103 |
*edx = 0;
|
| 1104 |
break;
|
| 1105 |
case 0x80000008: |
| 1106 |
/* virtual & phys address size in low 2 bytes. */
|
| 1107 |
/* XXX: This value must match the one used in the MMU code. */
|
| 1108 |
if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
|
| 1109 |
/* 64 bit processor */
|
| 1110 |
/* XXX: The physical address space is limited to 42 bits in exec.c. */
|
| 1111 |
*eax = 0x00003028; /* 48 bits virtual, 40 bits physical */ |
| 1112 |
} else {
|
| 1113 |
if (env->cpuid_features & CPUID_PSE36)
|
| 1114 |
*eax = 0x00000024; /* 36 bits physical */ |
| 1115 |
else
|
| 1116 |
*eax = 0x00000020; /* 32 bits physical */ |
| 1117 |
} |
| 1118 |
*ebx = 0;
|
| 1119 |
*ecx = 0;
|
| 1120 |
*edx = 0;
|
| 1121 |
if (env->nr_cores * env->nr_threads > 1) { |
| 1122 |
*ecx |= (env->nr_cores * env->nr_threads) - 1;
|
| 1123 |
} |
| 1124 |
break;
|
| 1125 |
case 0x8000000A: |
| 1126 |
*eax = 0x00000001; /* SVM Revision */ |
| 1127 |
*ebx = 0x00000010; /* nr of ASIDs */ |
| 1128 |
*ecx = 0;
|
| 1129 |
*edx = 0; /* optional features */ |
| 1130 |
break;
|
| 1131 |
default:
|
| 1132 |
/* reserved values: zero */
|
| 1133 |
*eax = 0;
|
| 1134 |
*ebx = 0;
|
| 1135 |
*ecx = 0;
|
| 1136 |
*edx = 0;
|
| 1137 |
break;
|
| 1138 |
} |
| 1139 |
} |