Revision 4d1165fa hw/pl011.c

b/hw/pl011.c
99 99 
    case 18: /* UARTDMACR */
100 100 
        return s->dmacr;
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    default:
102 
        cpu_abort (cpu_single_env, "pl011_read: Bad offset %x\n", offset);
102 
        cpu_abort (cpu_single_env, "pl011_read: Bad offset %x\n", (int)offset);
103 103 
        return 0;
104 104 
    }
105 105 
}
......
172 172 
            cpu_abort(cpu_single_env, "PL011: DMA not implemented\n");
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        break;
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    default:
175 
        cpu_abort (cpu_single_env, "pl011_write: Bad offset %x\n", offset);
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        cpu_abort (cpu_single_env, "pl011_write: Bad offset %x\n", (int)offset);
176 176 
    }
177 177 
}
178 178 

  		












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