Revision 4dc064e6 target-arm/translate.c
| b/target-arm/translate.c | ||
|---|---|---|
| 5137 | 5137 |
neon_store_reg64(cpu_V0, rd + pass); |
| 5138 | 5138 |
} else if (op == 5 || (op >= 8 && op <= 11)) {
|
| 5139 | 5139 |
/* Accumulate. */ |
| 5140 |
if (op == 10 || op == 11) {
|
|
| 5141 |
gen_neon_negl(cpu_V0, size); |
|
| 5142 |
} |
|
| 5143 | 5140 |
neon_load_reg64(cpu_V1, rd + pass); |
| 5144 | 5141 |
switch (op) {
|
| 5145 |
case 5: case 8: case 10: /* VABAL, VMLAL, VMLSL */ |
|
| 5142 |
case 10: /* VMLSL */ |
|
| 5143 |
gen_neon_negl(cpu_V0, size); |
|
| 5144 |
/* Fall through */ |
|
| 5145 |
case 5: case 8: /* VABAL, VMLAL */ |
|
| 5146 | 5146 |
gen_neon_addl(size); |
| 5147 | 5147 |
break; |
| 5148 | 5148 |
case 9: case 11: /* VQDMLAL, VQDMLSL */ |
| 5149 | 5149 |
gen_neon_addl_saturate(cpu_V0, cpu_V0, size); |
| 5150 |
if (op == 11) {
|
|
| 5151 |
gen_neon_negl(cpu_V0, size); |
|
| 5152 |
} |
|
| 5150 | 5153 |
gen_neon_addl_saturate(cpu_V0, cpu_V1, size); |
| 5151 | 5154 |
break; |
| 5152 | 5155 |
default: |
| ... | ... | |
| 5284 | 5287 |
tmp2 = tmp4; |
| 5285 | 5288 |
} |
| 5286 | 5289 |
gen_neon_mull(cpu_V0, tmp, tmp2, size, u); |
| 5287 |
if (op == 6 || op == 7) {
|
|
| 5288 |
gen_neon_negl(cpu_V0, size); |
|
| 5289 |
} |
|
| 5290 | 5290 |
if (op != 11) {
|
| 5291 | 5291 |
neon_load_reg64(cpu_V1, rd + pass); |
| 5292 | 5292 |
} |
| 5293 | 5293 |
switch (op) {
|
| 5294 |
case 2: case 6: |
|
| 5294 |
case 6: |
|
| 5295 |
gen_neon_negl(cpu_V0, size); |
|
| 5296 |
/* Fall through */ |
|
| 5297 |
case 2: |
|
| 5295 | 5298 |
gen_neon_addl(size); |
| 5296 | 5299 |
break; |
| 5297 | 5300 |
case 3: case 7: |
| 5298 | 5301 |
gen_neon_addl_saturate(cpu_V0, cpu_V0, size); |
| 5302 |
if (op == 7) {
|
|
| 5303 |
gen_neon_negl(cpu_V0, size); |
|
| 5304 |
} |
|
| 5299 | 5305 |
gen_neon_addl_saturate(cpu_V0, cpu_V1, size); |
| 5300 | 5306 |
break; |
| 5301 | 5307 |
case 10: |
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