Revision 4de9b249 hw/mips_malta.c
| b/hw/mips_malta.c | ||
|---|---|---|
| 54 | 54 |
|
| 55 | 55 |
static PITState *pit; |
| 56 | 56 |
|
| 57 |
/* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ |
|
| 57 | 58 |
static void pic_irq_request(void *opaque, int level) |
| 58 | 59 |
{
|
| 59 |
CPUState *env = first_cpu; |
|
| 60 |
if (level) {
|
|
| 61 |
env->CP0_Cause |= 0x00000400; |
|
| 62 |
cpu_interrupt(env, CPU_INTERRUPT_HARD); |
|
| 63 |
} else {
|
|
| 64 |
env->CP0_Cause &= ~0x00000400; |
|
| 65 |
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
|
| 66 |
} |
|
| 60 |
cpu_mips_irq_request(opaque, 2, level); |
|
| 67 | 61 |
} |
| 68 | 62 |
|
| 69 | 63 |
/* Malta FPGA */ |
Also available in: Unified diff